Thermal accumulation improvement for fabrication manufacturing of monolithic 3D integrated circuits

Abstract

The thermal accumulation improvement is based on laser epitaxial growth for monolithic 3D-ICs manufacturing. We propose one structure which has a thermal conduction layer such as Cu in ILD oxide layer. To reduce the Via depth and ILD oxide thickness can improve the re-crystallization quality for upper Si layer. With the conduction Cu layer, the Via depth can reduce to 200 nm, and the maximum temperature of the 1 8t layer poly gate and source/drain maintains as low as .....,320K and .....,350K, respectively, for laser re-crystallization annealing.

(Invited) Monolithic Three-Dimensional Integrated Circuits: Process and Design Implications

“…Such benefits of monolithic 3D integration are convinced by quite a few designers through various design and optimization techniques [5][6][7][8][9][10][11][12][13][14]. For example, Davis, et al suggested that block level design partitioning (multi-tier functional blocks) can be beneficial for monolithic 3D ICs by showing a 3x reduction in die size and 12x reduction in footprint on a logic block [14].…”

“…Accordingly, more wires can be routed in the vertical dimension, thereby reducing the total wirelength and footprint. In addition, extremely high bandwidth can be achieved for communication between different tiers.Such benefits of monolithic 3D integration are convinced by quite a few designers through various design and optimization techniques [5][6][7][8][9][10][11][12][13][14]. For example, Davis, et al suggested that block level design partitioning (multi-tier functional blocks) can be beneficial for monolithic 3D ICs by showing a 3x reduction in die size and 12x reduction in footprint on a logic block [14].…”

Properties and Numerical Modeling-Simulation of Phase Changes Material

“…Solar energy accumulation can be technologically realized through a wide variety of methods; also, research in the field is www.intechopen.com being consistently developed (Juodkazis, Saulius;, Zhen Ren at al. Januar 2010at al. 2008 ).…”

Extreme ultraviolet lithography and three dimensional integrated circuit—A review

“…[56][57][58][59] There is only one substrate, and all other layers are fabricated based on the substrate. After the devices on the substrate are fabricated, a second layer of silicon or other semiconductor film is grown on top of the first layer of devices by deposition or a thin layer may be attached using a method similar to that used in the silicon-on-insulator (SOI) process.…”