The effect of plasma-induced oxide and interface degradation on hot carrier reliability

Noguchi, Ko; Okumura, K.

doi:10.1109/relphy.1994.307832

Cited by 22 publications

(4 citation statements)

References 22 publications

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“…Gate charging during plasma-assisted device processing steps often causes gate-oxide degradation, latent damage or even gate-oxide breakdown [1,2]. The tunnelling current, which is forced through the gate oxide during charging, results in charge build-up, generation of new oxide traps and generation of interface states.…”

Section: Introductionmentioning

confidence: 99%

Increased hole trapping in gate oxides as latent damage from plasma charging

Brozek¹,

Viswanathan²

1997

Semicond. Sci. Technol.

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With aggressive device scaling and the wide use of plasma-assisted processes, the device damage caused by process-induced charging is receiving growing attention, from both basic understanding and technological points of view. The paper presents results of hole-trapping studies in the thin gate oxide of plasma-damaged NMOS and PMOS transistors. In addition to neutral electron traps and passivated interface damage, which are commonly observed in plasma charging latent damage, we observed and identified hole traps, generated by plasma stress. Enhanced hole trapping in the gate oxide of plasma-damaged devices was studied using Fowler-Nordheim stress and substrate hot-hole injection applied to antenna test structures sensitive to process-induced charging. The number of hole traps increases with increasing antenna ratio, indicating that the mechanism of hole-trap generation is based on electrical stress and current flow, forced through the oxide due to charging under plasma etching or ion implantation conditions.

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Section: Introductionmentioning

confidence: 99%

Increased hole trapping in gate oxides as latent damage from plasma charging

Brozek¹,

Viswanathan²

1997

Semicond. Sci. Technol.

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“…For the MOSFETs applications, the magnitude of the leakage will reach a few nanoampere at operating voltage and should be classified as a failure. In spite of reduced hot-carrier degradation for devices with thinner gate oxides [14], Figs. 2 and 3 clearly demonstrate the enhanced oxide failure rate, including complete and quasi-breakdown, induced by plasma with the presence of photoresist.…”

Section: Resultsmentioning

confidence: 97%

Resist-related damage on ultrathin gate oxide during plasma ashing

Chien

Chang

Lin

et al. 1997

IEEE Electron Device Lett.

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This paper presents an important observation of plasma-induced damage on ultrathin oxides during O 2 plasma ashing by metal "antenna" structures with photoresist on top of the electrodes. It is found that for MOS capacitors without overlying photoresist during plasma ashing, only minor damage occurs on thin oxides, even for oxide thickness down to 4.2 nm and an area ratio as large as 10 4 . In contrast, oxides thinner than 6 nm with resist overlayer suffer significant degradation from plasma charging. This phenomenon is contrary to most previous reports. It suggests that the presence of photoresist will substantially affect the plasma charging during ashing process, especially for devices with ultrathin gate oxides.

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“…Also it has been reported that the plasma processing degrades the transconductance of MOSFETs [8], [9] and accelerates the hot carrier degradation [8]. We found that Qbd is a good monitor for the antenna effect [2] as shown in Fig.9, while tbd is "not", as shown in Fig.10.…”

Section: Applications To Evaluation Of Process-induced Gate Oxide Degmentioning

confidence: 56%

A new gate oxide lifetime prediction method using cumulative damage law and its applications to plasma-damaged oxides

Eriguchi

Uraoka²,

Odanaka³

Proceedings of International Electron Devices Meeting

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A Model for Cumulative Damage LawThe Cumulative Damage Law to the electrical stress, which correlates charge-to-breakdown with constant current injection (Q,,) to time-to-breakdown with constantvoltage stress (t,,), is theoretically derived from the defect generation model. Based on this law, we propose a new gate oxide lifetime prediction method. Although in some cases, the degradation of gate oxide induced by the plasma and ion implantation processes can not be distinguished by tbd measurement, the new method allows an accurate and relevant evaluation of process-induced gate oxide degradation.The gate oxide wearout is related to the generation of the defects such as the electron trapping in the oxide and the interface states [4]. In general, the defect generation model includes the generation rate as a function of "the electron energy, E" in the oxide [4]. Since the electron energy relaxation length in SiO, films is about 5 nm [5], the energy distribution is assumed to be in equilibrium at the interface in the case of the oxide thicker than 5 nm. Therefore, instead of E, we introduce the new generation rate a(J) as a function of "the current density J" (or "the electrical field E,,") into the conventional rate equation as follows: Introduction dnldt = MJ) J l e ( N -n)(1) Process-induced degradation of gate oxide becomes a key issue in the development for highly reliable MOSFET devices. Charge-to-breakdown with constant current injection (Q,) has been proposed to evaluate the gate oxide degradation induced by the antenna effect [1],[21. However, the Q, method has little impact on the "lifetime" prediction (time-to-breakdown with constant-voltage stress ; tbd) of the gate oxide degradation. Also, the plasmainduced damage has not so far been characterized by t,, measurement. It is needed to clarify the relationship between Qbd and tbd and to evaluate the process-induced oxide lifetime degradation.The purpose of this paper is to present a new lifetime prediction method based on Cumulative Damage Law to the electrical stress. The Cumulative Damage Law [3], which explicates the relationship between Qbd and t, , is theoretically derived from a new defect generation model. It is also found that the gate oxide degradation induced by the plasma and ion implantation processes can not be characterized by the tbd testing. The present prediction method gives an excellent explanation for this phenomenon and clearly characterizes the plasma-induced and ion implantation-induced oxide lifetime degradation.where n is the defect density, e is the elemental charge, and N is the precursor defect sites. As shown in Fig.1, Qbd measurement introduces J-dependence of Q, and the defect generation rate MJ,J for (I). In the case of t, , measurement, J is a function of time in (1).We postulate that the oxide breaks down when n reaches a critical value No which is independent of the stress type. Then, the two equations can be integrated until n=No for both Qbd and tbd measurements, respectively. By assuming that a(J) in tbd testing is equa...

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The effect of plasma-induced oxide and interface degradation on hot carrier reliability

Cited by 22 publications

References 22 publications

Increased hole trapping in gate oxides as latent damage from plasma charging

Increased hole trapping in gate oxides as latent damage from plasma charging

Resist-related damage on ultrathin gate oxide during plasma ashing

A new gate oxide lifetime prediction method using cumulative damage law and its applications to plasma-damaged oxides

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