1991
DOI: 10.1557/proc-219-321
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The Application of Hydrogenation to Amorphous Silicon Thin Film Transistors for the Decrease of the off Current

Abstract: The influence of hydrogenation on OFF current of TFTs with a bottom gate staggered structure has been investigated. The hydrogenation is done by exposing the surface of the a-Si:H channel layer to H2 plasma. The hydrogenation decreases the OFF current by more than one order of magnitude. The decrease in the OFF current is attributed to the increase in the density of states at the interface between the a-Si:H channel layer and the SiN passivating layer.

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Cited by 10 publications
(2 citation statements)
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“…When the OFETs are heated at a high temperature, e.g., 85 °C, the devices may suffer performance degradation. For example, it has been reported that I off in the device increases exponentially with temperature, and the correspondingly increased energy loss is detrimental to the OFETs in practical operating scenarios . As shown in Figure d, for the neat device after heating, I off and threshold voltage are shifted up (∼10 –9 A) and to the right (∼18 V), respectively.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…When the OFETs are heated at a high temperature, e.g., 85 °C, the devices may suffer performance degradation. For example, it has been reported that I off in the device increases exponentially with temperature, and the correspondingly increased energy loss is detrimental to the OFETs in practical operating scenarios . As shown in Figure d, for the neat device after heating, I off and threshold voltage are shifted up (∼10 –9 A) and to the right (∼18 V), respectively.…”
Section: Resultsmentioning
confidence: 99%
“…For example, it has been reported that I off in the device increases exponentially with temperature, and the correspondingly increased energy loss is detrimental to the OFETs in practical operating scenarios. 19 As shown in Figure 1d, for the neat device after heating, I off and threshold voltage are shifted up (∼10 −9 A) and to the right (∼18 V), respectively. Conversely, such a high temperature has no significant effect on OFETs made of blends comprising 2% PS, at which their comparatively low I off of ∼10 −10 A and threshold voltage of ∼8 V contribute to reduced power consumption in the device.…”
Section: Introductionmentioning
confidence: 80%