2016
DOI: 10.1109/tcsii.2015.2504025
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Subthreshold Level Shifter With Self-Controlled Current Limiter by Detecting Output Error

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Cited by 44 publications
(23 citation statements)
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“…5(c)). The variations of the V OL then increases the variability of the static power for extremely low V ddL s. [16] 180nm Bulk 50 mV 96 mV 1.8 V 173@0.4V, 100KHZ * 20xINV 31.7@0.4V 55pW@0.4V 108.8 [4] 65nm Bulk 100 mV N/A 1.2 V 90.9@0.2V, 1MHz * 100fF 13.7@0.2V * 1.24nW@0.2V * 31.3 [5] 65nm Table II makes a comparison between this work and several state-of-the art designs. Apart from the minimum V ddL , reported characteristics of the proposed level shifter in Table II are post-layout simulation results at the TT process corner and room temperature.…”
Section: Discussionmentioning
confidence: 99%
“…5(c)). The variations of the V OL then increases the variability of the static power for extremely low V ddL s. [16] 180nm Bulk 50 mV 96 mV 1.8 V 173@0.4V, 100KHZ * 20xINV 31.7@0.4V 55pW@0.4V 108.8 [4] 65nm Bulk 100 mV N/A 1.2 V 90.9@0.2V, 1MHz * 100fF 13.7@0.2V * 1.24nW@0.2V * 31.3 [5] 65nm Table II makes a comparison between this work and several state-of-the art designs. Apart from the minimum V ddL , reported characteristics of the proposed level shifter in Table II are post-layout simulation results at the TT process corner and room temperature.…”
Section: Discussionmentioning
confidence: 99%
“…Several improvements to the conventional LS topologies [10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26] have been recently proposed to mitigate their intrinsic drawbacks when wide-range voltage-level conversion is required. Essentially, most of the solutions based on the DCVS scheme aim to weaken the PUN by means of reduced swing inverters [19] and/or diode-connected n-channel metal-oxide-semiconductor (nMOS)/p-channel metal-oxide-semiconductor (pMOS) [12,16].…”
Section: Related Workmentioning
confidence: 99%
“…The power supply of noncritical sections of the system could be aggressively scaled down to the subthreshold/near-threshold region in order to optimize energy consumption [3,8]. In such a case, low energy/delay level shifters (LSs), able to guarantee reliable wide-range voltage-level conversion, need to be used [10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26].…”
Section: Introductionmentioning
confidence: 99%
“…To realize robust conversions between large supply voltage differences, several level shifters have been proposed [15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32]. In order to balance the strength of the pull-up and pull-down networks in cross-coupled based level shifter, in [18,26], diode current limiters are inserted in the pull-up networks to reduce the pull-up strength.…”
Section: Introductionmentioning
confidence: 99%