Sub-40 nm PtSi Schottky source/drain metal–oxide–semiconductor field-effect transistors

Abstract

PtSi source/drain p-type metal–oxide–semiconductor field-effect transistors (MOSFETs) have been fabricated at sub-40 nm channel lengths with 19 Å gate oxide. These devices employ gate-induced field emission through the PtSi ∼0.2 eV hole barrier to achieve current drives of ∼350 μA/μm at 1.2 V supply. Delay times estimated by the CV/I metric extend scaling trends of conventional p-MOSFETs to ∼2 ps. Thermal emission limits on/off current ratios to ∼20–50 in undoped devices at 300 K, while ratios of ∼107 are measured at 77 K. Off-state leakage can be reduced by implanting a thin layer of fully depleted donors beneath the active region to augment the Schottky barrier height or by use of ultrathin silicon-on-insulator substrates.

Subthreshold and scaling of PtSi Schottky barrier MOSFETs

“…While earlier devices exhibited low drive currents [6,7], recent experimental research has focused on either device fabrication or operation at low temperatures [8][9][10]. Other researchers have successfully used SiGe as the source/drain [11], or concentrated on silicon-on-insulator (SOI) devices [12,13].…”

“…The sidewall spacer was formed by a rapid thermal oxidation (RTO) and a nominal thickness of 135 Å was obtained. We deposited 300 Å of Pt at the S/D and a subsequent anneal allowed the formation of PtSi [5,9]. The devices were fabricated at National Semiconductor in Santa Clara, CA, using an 8-in.…”

Specific contact resistance measurements of metal-semiconductor junctions

“…Metal-semiconductor junctions are essential to any electronic system containing semiconductors. These junctions have always been a topic of research [1][2][3].…”

Experimental and simulation study of the Schottky barrier lowering by substrate doping variation for PtSi Source/Drain SBFETs

“…Silicide source/drain (S/D) Schottky barrier field-effect transistors (SBFETs) are promising candidates for sub-32nm CMOS technology [1][2][3][4], as the silicide S/D can provide abrupt junctions together with lower serial resistance as compared to conventional doped S/D junctions. One of the key challenges in SBFETs is to obtain a low Schottky barrier height (SBH) at the silicide-channel junction [2]- [3].…”

“…One of the key challenges in SBFETs is to obtain a low Schottky barrier height (SBH) at the silicide-channel junction [2]- [3]. PtSi/YbSi 1+x were considered to be among the best silicide materials for p-/ n-SBFETs application, due to their relative low hole/ electron SBH [4].…”