Strain mapping of Si devices with stress memorization processing

Abstract

Dual lens dark field electron holography and Moiré fringe mapping from dark field scanning transmission electron microscopy are used to map strain distributions at high spatial resolution in Si devices processed with stress memorization techniques (SMT). It provides experimental evidence that strain in the Si channel is generated by dislocations resulting from SMT. The highest value of strain, up to 1.1% (1.9 GPa in stress) occurs at the Si surface along the channel direction: ⟨110⟩. An increase of ∼0.2% strain in the channel is observed after removing the poly-Si gate through the replacement high-k metal gate process.

Formation of multiple dislocations in Si solid-phase epitaxy regrowth process using stress memorization technique

“…Note that the lateral stress is tensile above the dislocation core and compressive below the dislocation core. However, the intrinsic stacking faults along the {1 1 1} plane, which have two symmetric boundaries of micro twins, do not act as stress sources and have a minor influence on the 2D strain distribution, which is similar to strain mapping experimental results [4]. The magnitude of the elastic stress r is proportional to the shear modulus G and Burgers vector b, which attenuates with increasing the distance (r) from the dislocation core, i.e., r is equal to $Gb/r.…”

“…An improved SMT has been demonstrated to provide a large NFET performance gain (up to 15%) in the HK/MG process, with Si dislocations formed during the strained amorphous Si (a-Si) solid-phase epitaxy regrowth (SPER) in lightly doped S/D regions. The tensile strain in the channel region can reach 1% [3], or even 1.1% (1.9 GPa) [4], as determined by nano-beam diffraction measurements. Therefore, the mechanism of defect formation and type of defect-induced stress are important for device design.…”

Strain mapping at the interface of InP/In x Ga1-x As/InP as measured by the scanning transmission electron microscope-moiré fringe method

“…Recently, the scanning moiré fringe (SMF) method [18][19][20][21][22][23] was proposed, which enabled us to obtain the strain map at an area of 100 to 200 nm in scale without the need for a reference wave. Since SMF patterns are formed by applying a sampling interval (scanning grating) that is close to a periodicity of the crystal lattice, 24) it does not require a highmagnification scanning transmission electron microscope (STEM) image.…”

Nanoscale strain distributions in embedded SiGe semiconductor devices revealed by precession electron diffraction and dual lens dark field electron holography

“…4,5 To further improve spatial resolution, dual lens dark field electron holography has been developed to obtain spatial resolution of less than 1 nm (fringe spacing less than 0.5 nm). [6][7][8][9] In this paper, we present the use of precession electron diffraction and dual lens dark field electron holography to map the strain distributions generated by embedded SiGe (e-SiGe) structures and we compare our experimental results to mechanical modeling to gain insight into how strain distributions are formed at these length scales.…”