Stress-Memorization-Technique by Si dislocations is effective in enhancing NFET device performance [1,2]. For the first time, MD (Molecular Dynamic) simulations are applied to explain the formation mechanism of dislocations during the Solid-Phase-Epitaxy-Regrowth (SPER) process. A semi-empirical TCAD method based on lattice-KMC (L-KMC) is then developed to predict dislocation formation. The simulated dislocation positions agree well with silicon experiments characterized by TEM. TCAD simulations show that the resulting dislocations are along the [111] direction and provide ~650MPa average longitudinal stress in channel regions, consistent with Nano-Beam-Diffraction (NBD) strain measurement. The channel stress is predicted by simulation to further increase by 1.5X after the poly-silicon gate removal step in a replacement-gate process. The dislocation SMT enhances NFET electron mobility by 25% and Ion-Ioff performance by 15%.
The ab initio work quantitatively explains the physical mechanism of threshold voltage shifts in n-type and ptype metal-oxide-semiconductor field-effect transistors with HfO 2 /Al 2 O 3 gate stack. In the study, the θ phase alumina has been chosen for better lattice matching of the (100) HfO 2 and (100) Si substrate. Using dipole correction method, the dominant dipole moment responsible for the threshold voltage shift has been identified at the interface of HfO 2 /Al 2 O 3 . Our HfO 2 /Al 2 O 3 atomic model shows the dipole moment decreases almost linearly as the alumina thickness decreases from four monolayers (13 Å) to one monolayer (3 Å). On account of the effects of capacitance and the dipole moment, our ab initio calculation quantitatively explains the trend and sensitivity of experimental threshold voltage shifts on n-and p-MOSFET's.
Keywords-ab initio, threshold voltage, atomic model, HfO 2 /Al 2 O 3 /(100)Si
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