Stackable InGaAs-on-Insulator HEMTs for Monolithic 3-D Integration

The advancements in semiconductor technology greatly impact the growth of hybrid VLSI devices and components. The nanometer technology has been possibly executed due to the enhancement of the scaling factor of the MOSFETs. Since the MOSFETs play a vital role in building dense devices, it also has several research insights with various semiconductor materials with high-ƙ dielectrics. The high-ƙ dielectric material in the place of the conventional oxide layer in the MOSFET design results in improved performance by reducing the Short Channel Effects (SCEs). In this research work, an analytical model of the lightly doped Cylindrical Surrounding Double-Gate (DG) MOSFET has been proposed. The capacitance modeling has been done for this cylindrical structure. This modeling has been analyzed for all operating regions of the transistors, capacitance estimation, and electrical field dependence on the capacitance. The results have been compared with the results derived from previous research and tabulated. This novel model occupies less area on the board, and routing is more accessible than the conventional DG MOSFET design. The overall results have been following the agreement in terms of accuracy, area tradeoff, and high speed, making the novel model suitable for high-frequency/RF hybrid applications.

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“…Substituting ( 10) in (11) and after reduction will give 12) An electric field in the cylindrical capacitor within the cylinder is expressed as:…”

Section: A Electrical Field In the Capacitor Of Csdg Mosfetmentioning

confidence: 99%

“…The drain current models were established in recent works in the nanometer regime [7][8][9][10][11], which concentrates only on the long channel models [5,12]. Hence, capacitance modeling with good accuracy of transconductance and electrical field in the cylindrical structure is essential for the accurate designing of CSDG MOSFETs.…”

Section: Introductionmentioning

confidence: 99%

Capacitive Modeling of Cylindrical Surrounding Double-Gate MOSFETs for Hybrid RF Applications

Gowthaman

Srivastava

2021

IEEE Access

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“…The energy stored in this capacitor is responsible for the channel potential, which in turn switch-ON the transistor for RF applications. The parabolic approximation of the SCEs in the CSDG MOSFET regime has been made for the energy density profile [42][43][44][45][46][47].…”

Section: B Capacitances In the Csdgmentioning

confidence: 99%

Parametric Analysis of CSDG MOSFET With La₂O₃ Gate Oxide: Based on Electrical Field Estimation

Gowthaman¹,

Srivastava

2021

IEEE Access

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Cylindrical Surrounding Double-Gate (CSDG) MOSFETs have been designed for a suitable CMOS replacement to diminish the power and area tradeoff. With these MOSFETs below 70 nm node for Semiconductor Industry Association (SIA) roadmap, the CMOS technology has excellent immunity to the Short Channel Effects (SCE) and better scalability. To reduce the SCE, the device was analyzed by improving the gate oxide thickness between the gate terminal and channel material and replacing the conventional Silicon dioxide layer with numerous high-ƙ dielectric materials. The gate oxide thickness is scalable so that it should have the same thickness as that of the Equivalent Oxide Thickness (EOT). This kind of novel structure shows improvement in the ON-state current and OFF-state current. The usage of the cylindrical surrounding double-gate and the high-ƙ dielectric in the oxide layer makes the MOSFET with improved stability and controllability. In this paper, the high-ƙ material is chosen in a way that it has been applied in the CSDG environment and the electrical field, electron densities have been analyzed. The semiconductor can exhibit various energy bands at the Fermi level, commonly referred to as valley. These kinds of valley semiconductors, which have several valleys are called multi-valley semiconductors. The current value in valley-1 is 2.41 mA/μm; it also drops to 62.14 % than valley-4, which has 6.38 mA/μm. However, valley-2 and valley-3 have intermediate values. The energy in the sub-band for the operating region of the source has been observed to be 19.12 % to the drain side which has the value of 0.041 eV at the terminal end. This shows the modeled CSDG MOSFET works well with the operating electric field created by the cylindrical capacitors constituted by the two different gate materials surrounding the substrate.

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“…N. Waldron et al [6] developed the aspect-ratio-trapping technique for heterogeneous integration, but the consistency and defects of the materials are difficult to manage. Recently, wafer bonding technology has been widely used to realize the integration of InGaAs channel material on Si substrates [7][8][9][10]. Compared with the aforementioned technology, wafer bonding can more easily form a high-quality InGaAs channel layer.…”

Section: Introductionmentioning

confidence: 99%

High-Performance InGaAs HEMTs on Si Substrates for RF Applications

et al. 2022

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In this paper, we have fabricated InGaAs high-electron-mobility transistors (HEMTs) on Si substrates. The InAlAs/InGaAs heterostructures were initially grown on InP substrates by molecular beam epitaxy (MBE), and the adhesive wafer bonding technique was employed to bond the InP substrates to Si substrates, thereby forming high-quality InGaAs channel on Si. The 120 nm gate length device shows a maximum drain current (ID,max) of 569 mA/mm, and the maximum extrinsic transconductance (gm,max) of 1112 mS/mm. The current gain cutoff frequency (fT) is as high as 273 GHz and the maximum oscillation frequency (fMAX) reaches 290 GHz. To the best of our knowledge, the gm,max and the fT of our device are the highest ever reported in InGaAs channel HEMTs on Si substrates at given gate length above 100 nm.

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Stackable InGaAs-on-Insulator HEMTs for Monolithic 3-D Integration

Cited by 19 publications

References 23 publications

Capacitive Modeling of Cylindrical Surrounding Double-Gate MOSFETs for Hybrid RF Applications

Capacitive Modeling of Cylindrical Surrounding Double-Gate MOSFETs for Hybrid RF Applications

Parametric Analysis of CSDG MOSFET With La₂O₃ Gate Oxide: Based on Electrical Field Estimation

High-Performance InGaAs HEMTs on Si Substrates for RF Applications

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Stackable InGaAs-on-Insulator HEMTs for Monolithic 3-D Integration

Cited by 19 publications

References 23 publications

Capacitive Modeling of Cylindrical Surrounding Double-Gate MOSFETs for Hybrid RF Applications

Capacitive Modeling of Cylindrical Surrounding Double-Gate MOSFETs for Hybrid RF Applications

Parametric Analysis of CSDG MOSFET With La2O3 Gate Oxide: Based on Electrical Field Estimation

High-Performance InGaAs HEMTs on Si Substrates for RF Applications

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Parametric Analysis of CSDG MOSFET With La₂O₃ Gate Oxide: Based on Electrical Field Estimation