1985
DOI: 10.1109/edl.1985.26199
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Specific contact resistivity of TiSi2to P+and n+junctions

Abstract: Specific contact resistivities of the Al/TiW/TiSiz/Si system are characterized. It is found that without a TiW barrier layer, AI can penetrate through the TiSi2 layer and significantly affect the TiSiz/Si interfacial contact resistance. Intrinsic TiSil contact resistivities to n+ and p+ silicon are characterized with a TiW barrier between the silicide and the aluminum. TiSiz contact resistivity to n + silicon is found to be about one order of magnitude lower than that of AI to n * silicon. However, Ti& to p * … Show more

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Cited by 46 publications
(6 citation statements)
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“…The very high contact resistivity value measured for TiSi2 to p+ junction seems unsuitable for a real device. However, Hut et al (16) reported that the TiSi2 to p+ contact resistance is very dependent on the boron-implanted dose, and therefore, for a p-type channel MOS device using TiSi2 technology, it is important to keep the surface concentration high enough in order to maintain a low contact resistance.…”
Section: Discussionmentioning
confidence: 99%
“…The very high contact resistivity value measured for TiSi2 to p+ junction seems unsuitable for a real device. However, Hut et al (16) reported that the TiSi2 to p+ contact resistance is very dependent on the boron-implanted dose, and therefore, for a p-type channel MOS device using TiSi2 technology, it is important to keep the surface concentration high enough in order to maintain a low contact resistance.…”
Section: Discussionmentioning
confidence: 99%
“…Choosing a typicat value of 30 A/cm2-k 2 (p-type silicon) for A** (13), (bB can then be calculated to be 0.58 _+ 0.02V, which is comparable to the reported barrier height of TiSi= to p-type silicon substrate (0.56V) (9). The value of (bB is not very sensitive to the choice of A** (13).…”
Section: [3]mentioning
confidence: 65%
“…The value of (bB is not very sensitive to the choice of A** (13). Choosing a typicat value of 30 A/cm2-k 2 (p-type silicon) for A** ( 13), (bB can then be calculated to be 0.58 _+ 0.02V, which is comparable to the reported barrier height of TiSi= to p-type silicon substrate (0.56V) (9). The error bar on the calculated barrier height is due to the uncertainty in the area caused by the silicon consumption during titanium silicide deposition.…”
Section: [3]mentioning
confidence: 67%
“…Hence, a concomitant reduction in source/drain junction depth is required to minimize short channel effects. [3][4][5][6] However, the sheet resistance of TiSi 2 formed at annealing temperatures lower than 800°C is relatively high because of the C49 structure. The selfaligned-silicide ͑salicide͒ technology has become an essential part of the fabrication process for recent ultrahigh-speed CMOS logic LSI circuits.…”
Section: Introductionmentioning
confidence: 99%