Simulation study for Dual Material Gate Hetero-Dielectric TFET: Static performance analysis for analog applications

Abstract

This paper presents simulation study of Static characteristics for DMG (Dual Material Gate) Hetero-Dielectric (H-D) Tunnel FET. Here, two previously reported device architectures i.e. a DMG Single Dielectric TFET and SMG (Single Material Gate) Hetero-Dielectric TFET have been optimized by tuning the work functions and length and later on their combined impact on the proposed device architecture i.e. DMG Hetero-Dielectric Tunnel FET (DMG H-D TFET) is beenstudied. Electrical parameters such as threshold voltage, drain current I ds , Sub threshold Slope, I on to I off ratio, ambipolar current I amb have been studied. Some of the important analog parameters like transconductance g m , drain conductance g d , Output resistance R out , transconductance generation efficiency g m /I ds have also been studied using ATLAS Device Simulation Software.

Threshold voltage model for hetero-gate-dielectric tunneling field effect transistors

“…As the length of high-κ region reduces, conduction band becomes shallow which makes band-to-band tunneling difficult and increases the threshold voltage Figure 5(b). Table 1 gives the comparison results of the proposed threshold voltage model with ref [13] results. The two results show close proximity with slight difference due to dual material gate in ref.…”

“…The two results show close proximity with slight difference due to dual material gate in ref. [13]. For fair comparison we have taken L=50 nm, L1=8 nm, kr2=21, kr1=3.9, metal work function 4.0 eV and 4.4 eV as suggested in ref.…”

“…Thus, to increase the ON-current and reduce the ambipolar current, researchers have introduced hetero-gate-dielectric (HGD) TFETs [11][12][13][14][15]. This device gives lower SS without scarifying the chip density.…”

Linearity and Analog Performance Realization of Energy-Efficient TFET-Based Architectures: An Optimization for RFIC Design

“…Keeping this in view, investigation of edge TFETs for further in wireless domain has continued and therefore, an attempt has been made with our previously proposed architecture, i.e., DMG (dual material gate) H-D (hetero-dielectric) TFET [6,14] having better analog performance than H-D TFET and better digital performance than both DMG TFET and H-D TFET. The present work focuses on the analog and linearity performance assessment of the above-mentioned three device architectures (shown in Figure 1) for RF/analog applications.…”

A performance analysis of Hetero- Dielectric Dual-Material-Gate silicon-on-insulator tunnel field effect transistors (HD-DMG SOI TFETs)

“…An investigation into the RF characteristics of hetero dielectric tunnel FET has been done by Kang et al in 2011 [7]. Various researches have tried to obtain superior electrical characteristics in tunnel FETs with hetero-dielectric (HD) [7] [8]. Also significant study was done on dual material gate with single dielectric using double gate technology [9] but considerable focus and deeper analysis was not given for dual material gate along with hetero dielectric structure in an SOI platform.…”