With decreasing device dimensions, the performance of carbon nanotube field-effect transistors (CNFETs) is limited by high Off currents except at low drain voltages. We show that an asymmetric design improves the performance, reducing Off-currents and extending the usable range of drain voltage. The improvement is most dramatic for ambipolar Schottky-barrier CNFETs. Moreover, this approach allows a single device to exhibit equally good performance as an n-or p-type transistor, by changing only the sign of the drain voltage. Even for CNFETs having ohmic contacts, an asymmetric design can greatly improve the performance for small-bandgap nanotubes.The performance of carbon nanotube field-effect transistors (CNFETs) can be greatly improved in many respects by scaling the devices to smaller size 1-4 . However, the improvements with smaller size are accompanied by the undesired effect of a lowered On-Off ratio at typical drain voltages. This restricts the range of usable drain voltage, which in turn limits the achievable On-currents. Most CNFETs to date operate as Schottky barrier (SB) CNFETs 1-7 , and the issue has been studied in detail for such devices 7,8 . But the problem occurs even for ohmic contacts, especially for small-bandgap tubes, as shown below.Here, we propose a novel device design for CNFETs that can be scaled down in size for good turn-on performance without severe restrictions on the usable drain voltage. The key idea of the new design is to have large electric fields at the source contact but small fields at the drain, to suppress unwanted tunneling. A related approach has recently been demonstrated for Si-based SB-FETs 9 . For an ambipolar SB-CNFET, the asymmetric design can suppress either the p-or the n-type branch of the ambipolar transport characteristic, depending only on the sign of the drain voltage. Thus the same device can act as an excellent p-or n-type transistor, and the turn-on performance for both types is controlled by the electrostatics (the geometry of the contact and gate) at the source electrode. By choosing metals of different work function for the gates, it should be possible to fabricate complementary SB-CNFETs that have the desired alignment of transfer characteristics (I vs. V g ) for standard logic applications.For a SB-CNFET, the asymmetric design solves the problem of Off-current that increases exponentially with drain voltage, so it allows larger On-currents. This is a critical issue as the device dimensions decrease 7,8 . Moreover, even for a CNFET having ohmic contacts 10 , e.g. to the valence band, suppressing the current into the conduction band can be essential when the nanotube (NT) bandgap is small.Two examples of possible asymmetric device geometries are shown in Fig.