Systematic study of contact annealing: Ambipolar silicon nanowire transistor with improved performance

Byon, Kumhyo; Tham, Douglas; Fischer, J. E.; Johnson, A. T. Charlie

doi:10.1063/1.2720309

Cited by 47 publications

(40 citation statements)

References 17 publications

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“…It also has been reported that the carrier mobility is sensitive to the electrical contacts between a metal and semiconductor [20]. The M-S-M model [23,24] applied to fit the data in figure 5 shows twofold lower carrier mobility than the annealed case [20]. The lower effective mobile-carrier density and mobility may explain the discrepancy between our work and [26], where the electrical contacts are Ohmic.…”

contrasting

confidence: 56%

“…This electron density is comparable to the hole concentration in the initial p-type Si, and may make the SiNW almost intrinsic, leading to the lower current while still giving n-type FET characteristics. It also has been reported that the carrier mobility is sensitive to the electrical contacts between a metal and semiconductor [20]. The M-S-M model [23,24] applied to fit the data in figure 5 shows twofold lower carrier mobility than the annealed case [20].…”

mentioning

confidence: 99%

“…While the top and bottom of the SiNW are covered with thermally grown SiO2 (due to SOI top-layer thinning and BOX below), the side walls of the SiNW are covered with SiO2 formed by the chemical cleaning of the sample in a mixture of sulfuric acid and hydrogen peroxide. As shown in figure 3 (inset), the electrical conductivity drops when the back-gate voltage (Vbg) increases to positive values, which is a typical p-type SiNW FET operating in accumulation mode: holes as majority carriers [20][21][22].…”

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confidence: 99%

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Integrated freestanding single-crystal silicon nanowires: conductivity and surface treatment

et al. 2010

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Abstract:Integrated freestanding single-crystal silicon nanowires with typical dimension of 100 nm × 100 nm × 5 μm are fabricated by conventional 1:1 optical lithography and wet chemical silicon etching. The fabrication procedure can lead to wafer-scale integration of silicon nanowires in arrays. The measured electrical transport characteristics of the silicon nanowires covered with/without SiO2 support a model of Fermi level pinning near the conduction band. The I-V curves of the nanowires reveal a current carrier polarity reversal depending on Si-SiO2 and Si-H bonds on the nanowire surfaces.

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confidence: 56%

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confidence: 99%

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confidence: 99%

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Integrated freestanding single-crystal silicon nanowires: conductivity and surface treatment

et al. 2010

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“…The conversion from unipolar p-type to ambipolar behavior, for instance, has been described for silicon nanowire FETs after vacuum annealing. [30] A marked increase in electron conduction has also been reported for nanoribbon graphene FETs after the devices were subjected to a similar treatment. [31] Thus, the effects of electrochemically mediated charge transfer to the O 2 /H 2 O redox couple appear to be ubiquitous, and have to be considered when interpreting the electrical behavior of all devices that have been exposed at one time or another to the ambient atmosphere.…”

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confidence: 85%

The Role of the Oxygen/Water Redox Couple in Suppressing Electron Conduction in Field‐Effect Transistors

et al. 2009

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The back-gated field-effect transistor (FET) configuration has been central to the study of the electronic transport properties of organic and nanoscale materials. [1][2][3] Three-terminal transport measurements using this geometry are facilitated by using a degenerately doped silicon wafer covered with a thin silicon oxide layer as the substrate. It has been widely assumed that the substrate did not influence the measurement of the intrinsic properties of the material under study. However, Chua et al. [4] recently demonstrated that changing the nature of the dielectric led to ambipolar behavior in FETs made from organic semiconductors that were previously thought to be exclusively hole (p-type) conductors. Silanol groups present on the SiO 2 surface were singled out as the culprits for generating electron traps responsible for suppressing electron (n-type) conduction in these devices. Here we show that the substrate-induced suppression of n-type behavior is not unique to organic FETs, but influences the measurements of all devices fabricated on SiO 2 /Si substrates. By using carbon nanotubes as the testbed, we investigated the impact of the chemical nature of the substrate and of ambient adsorbates on the field-effect switching behavior of both nanoscale and thin-film FETs. Our study revealed that the reduction of n-type conduction occurs when an adsorbed water layer containing solvated oxygen is present on the SiO 2 surface. This finding demonstrates that an electrochemical charge transfer reaction between the semiconducting channel and the aqueous oxygen redox couple is the underlying phenomenon governing the suppression of electron conduction in carbon nanotube devices. This effect should be taken into account when interpreting three-terminal measurements conducted on SiO 2 /Si substrates. We anticipate that the design of electronic devices, [5] chemical sensors, [6] and biosensors [7] that are based on the FET configuration will be largely influenced by the charge transfer mechanism that has been brought to light by this study.Individual carbon nanotube field-effect transistors (CFETs) are the most extensively studied molecular-scale FETs to date.

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“…There are reports on the development of Si NW-based nanoscale devices such as field-effect transistors (FETs) [1,2] with wrap-around gates, surface-gated sensitive chemical and biomolecular sensors [3,4], as well as nanoscale opto-electronic devices [5]. In the context of such nanowire-based device, one important physical parameter is the low-frequency flicker noise, which has a direct impact on the device performance.…”

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confidence: 99%

Low-frequency flicker noise in a MSM device made with single Si nanowire (diameter ≈ 50 nm)

2013

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Low-frequency flicker noise has been measured in a metal-semiconductor-metal (MSM) device made from a single strand of a single crystalline Si nanowire (diameter approximately 50 nm). Measurement was done with an alternating current (ac) excitation for the noise measurement superimposed with direct current (dc) bias that can be controlled independently. The observed noise has a spectral power density ∝1/fα. Application of the superimposed dc bias (retaining the ac bias unchanged) with a value more than the Schottky barrier height at the junction leads to a large suppression of the noise amplitude along with a change of α from 2 to ≈ 1. The dc bias-dependent part of the noise has been interpreted as arising from the interface region. The residual dc bias-independent flicker noise is suggested to arise from the single strand of Si nanowire, which has the conventional 1/f spectral power density.

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Systematic study of contact annealing: Ambipolar silicon nanowire transistor with improved performance

Cited by 47 publications

References 17 publications

Integrated freestanding single-crystal silicon nanowires: conductivity and surface treatment

Integrated freestanding single-crystal silicon nanowires: conductivity and surface treatment

The Role of the Oxygen/Water Redox Couple in Suppressing Electron Conduction in Field‐Effect Transistors

Low-frequency flicker noise in a MSM device made with single Si nanowire (diameter ≈ 50 nm)

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