2010
DOI: 10.1088/0957-4484/22/5/055704
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Integrated freestanding single-crystal silicon nanowires: conductivity and surface treatment

Abstract: Abstract:Integrated freestanding single-crystal silicon nanowires with typical dimension of 100 nm × 100 nm × 5 μm are fabricated by conventional 1:1 optical lithography and wet chemical silicon etching. The fabrication procedure can lead to wafer-scale integration of silicon nanowires in arrays. The measured electrical transport characteristics of the silicon nanowires covered with/without SiO2 support a model of Fermi level pinning near the conduction band. The I-V curves of the nanowires reveal a current ca… Show more

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Cited by 9 publications
(9 citation statements)
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“…It is well known that HF etching of the oxide leaves a nominally H-terminated Si(001)surface, but with some residual F [12,13]. …”
Section: Introductionmentioning
confidence: 99%
“…It is well known that HF etching of the oxide leaves a nominally H-terminated Si(001)surface, but with some residual F [12,13]. …”
Section: Introductionmentioning
confidence: 99%
“…Of course, in a thin-sheet geometry, one always has two interfaces. These can be made nominally identical for a free-standing NM 9 , but in practice the simpler and more relevant situation involves the nanomembrane resting on a host substrate, with an intervening dielectric layer. This dielectric layer allows use of the host substrate as a control gate.…”
mentioning
confidence: 99%
“…The electrodes and the RTD are made of a 25 nm thick nickel film. The device is fabricated with a standard micromachining technique, and the detailed fabrication method is described elsewhere 4346 . In brief, the inlet, outlet, and channel are formed by 30% w/w KOH etch at 60 °C bath temperature.…”
Section: Methodsmentioning
confidence: 99%