Thin films of In 2 Se 3 deposited by thermal co-evaporation crystallize upon vacuum annealing almost single phase into an, up to now, unknown structure. Only when the films are capped with a thin oxide layer before annealing, the reportedly stable ␥-In 2 Se 3 structure, single phase and aligned along the c axis forms. Rutherford backscattering confirms an In to Se ratio of 2 to 3 for both structures. Nevertheless, the new structure has distinct x-ray diffraction peaks and Raman spectra. The new structure has a much lower resistivity than the ␥-In 2 Se 3 structure, consistent with its smaller electrical and optical energy gap. Both structures show large photoconductivity.

We hypothesized that the interannual variability of the northeast Pacific Ocean circulation affects the return times of Fraser River sockeye salmon (Oncorhynchus nerka). Homeward migrations were simulated for 1982 (with a relatively weak Alaska Gyre circulation) and 1983 (with a relatively strong circulation) in the context of three sequential return migration phases: a nondirected oceanic phase, a directed oceanic phase, and a directed coastal phase. Passive drifters were simulated to examine the influence of ocean currents during the nondirected oceanic phase: model fish south of 48°N were advected closer to Vancouver Island in 1983 compared with 1982; those north of 48°N were advected closer to Vancouver Island in 1982 than in 1983. Fish were simulated during the directed oceanic phase using a variety of behaviour scenarios: model fish starting south of 50°N had earlier return times in 1983 than in 1982; those starting north of 50°N had return times in 1983 that were generally the same as or later than in 1982. We inferred that ocean currents would modulate the environmental influences on return times during the directed coastal migration phase, by deflecting sockeye salmon into different oceanographic domains along the British Columbia coast.

The Mössbauer spectra of Nd6Fe13X, where X is Si, Cu, Ag, and Au, have been measured between 80 and 500 K. A model corresponding to a basal alignment of the magnetic moments leads to excellent, internally consistent, fits for the Cu, Ag, and Au compounds. The resulting temperature dependences of the spectral hyperfine parameters are uniform and reveal for each Fe site the expected correlations between the isomer shift and the Wigner–Seitz cell volume and the hyperfine field and the number of Fe near neighbors. For Nd6Fe13Si, a different model must be used because of the presence of a spin reorientation below 155 K. Above 155 K, because of the axial alignment of the moments, and in agreement with the 295 K powder neutron diffraction results, the spectra can be analyzed with four sextets. Below 155 K, five additional sextets are required to fit the spectra because of a progressive transition towards a basal alignment of the Fe moments. At 80 K the mixed magnetic phase is 75% basal and 25% axial, whereas at 110 K the mixture is 50:50. The hyperfine parameters of the basal and axial sextets found for Nd6Fe13Si are consistent with those found for the basal Cu, Ag, and Au compounds and those observed for basal Nd6Fe13Sn. The lattice properties of the compounds, obtained from the temperature dependences of the isomer shift and the spectral absorption area, are consistent with the Wigner-Seitz cell volumes and the bonding of each crystallographically distinct Fe site. The magnetic anisotropy of a variety of Nd6Fe13X compounds is controlled by the s-p hybridization of the Nd–X bonds, a hybridization which is very sensitive to the electronic configuration of X.

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Abstract-Application of double gate or surround-gate vertical metal oxide semiconductor field effect transistors (MOSFETs) is hindered by the parasitic overlap capacitance associated with their layout, which is considerably larger than for a lateral MOSFET on the same technology node. A simple self-aligned process has been developed to reduce the parasitic overlap capacitance in vertical MOSFETs using nitride spacers on the sidewalls of the trench or pillar and a local oxidation. This will result in an oxide layer on all exposed planar surfaces, but no oxide layer on the protected vertical channel area of the pillar. The encroachment of the oxide on the side of the pillar is studied by transmission electron microscopy (TEM) which is used to calibrate the nitride viscosity in the process simulations. Surround gate vertical transistors incorporating the spacer oxidation have been fabricated, and these transistors show the integrity of the process and excellent subthreshold slope and drive current. The reduction in intrinsic capacitance is calculated to be a factor of three. Pillar capacitors with a more advanced process have been fabricated and the total measured capacitance is reduced by a factor of five compared with structures without the spacer oxidation. Device simulations confirm the measured reduction in capacitance.

a b s t r a c tCurrent transport at Schottky barriers is of particular interest for spin injection and detection in semiconductors. Here, electrodeposited Ni-Si contacts are fabricated and the transport mechanisms through the formed Schottky barrier are studied. Highly doped Si is used to enable tunneling currents. I-V, C-V and low-temperature I-V measurements are performed and the results are interpreted using tunneling theory for Schottky barriers and recent models for spatially distributed barrier heights. It is shown that, contrary to the case of lowly doped Si where thermionic emission dominates, tunneling is the dominant mechanism for reverse and low forward bias for highly doped Si. An exponential reverse bias I-V behavior with negative temperature coefficient is reported. An explanation can be found on the rapid decrease of the reverse bias I-V slope with temperature predicted by Padovani and Stratton for thermionic field emission in conjunction with the increase of the Schottky barrier height with temperature suggested for spatially distributed barrier heights.

The vertical MOSFET structure is one of the solutions for reducing the channel length of transistors under 50 nm. Surround gates can be easily realised in vertical MOSFETs which offer increased channel width per unit silicon area. In this paper, a low overlap capacitance, surround gate, vertical MOSFET technology is presented. A new process that uses spacer or fillet local oxidation is developed to reduce the overlap capacitance between the gate and the source/drain electrodes. Electrical characteristics of surround gate n-MOSFETs are presented and compared with characteristics from single gate and double gate devices on the same wafer. Transistors with channel length down to 100 nm have been realised. They show good symmetry between the source on top and source on bottom configuration and subthreshold slope down to 100 mV. The short channel effects of the surround gate MOSFETs are investigated.