Response shaper: a novel technique to enhance unknown tolerance for output response compaction

Abstract

The presence of unknown values in the simulation result is a key barrier to effective output response compaction in practice. This paper proposes a simple circuit module, called a response shaper, to reshape the scan-out responses before feeding them to a space compactor. Along with the proposed reshaping algorithm, response shapers can help the space compactor to reduce the number of undetectable modeled and un-modeled faults in the presence of unknown values. Moreover, the proposed compaction scheme is ATPGindependent and its hardware requirement is pattern-independent.In our experiments, we use a simple XOR compactor as the space compactor to evaluate the effectiveness of the response shaper. The results show that the number of undetectable faults and unobservable scan-out responses can be significantly reduced in comparison with the results of a convolutional compactor. The number of the extra scan-in bits required for the control signals of the response shapers is only a small fraction of the total test data volume. Also, its hardware overhead is acceptable and the runtime of the reshaping algorithm is scalable for large industrial designs.

On Determining the Real Output Xs by SAT-Based Reasoning

“…scan outs, and the inputs of any arbitrary compaction logic [16][17][18][19][20][21]. During scan-out a predetermined X can be converted into a specified value by feeding it e.g.…”

On efficient silicon debug with flexible trace interconnection fabric

“…It is not applicable for trace-based debug that targets on the bugs occurring in the CUD's normal operation. X-masking hardware is introduced to mask the X-bits at the input of test response compactor [26]. As masking data is required for every input channel with X-bit in each shift cycle, the hardware overhead for storing masking control data can be expensive.…”

A Novel Approach to Drastic Test Data Compression for Multiple Scan Designs

“…A response shaper inserted between test response output and MISR configures test response and degrades the probability of fault mask. The method is independent of ATPG process [4]. The proposed scheme achieves minimal observable faults in presence of Xs and maximal fault coverage on the whole [18].…”

“…Test stimuli and test response determine the storage capabilities of the ATE. The length of scan chains determines test application time [4]. Test cost includes the storage volume of tester, test application time, available pins and test channels.…”