2007 IEEE Symposium on VLSI Technology 2007
DOI: 10.1109/vlsit.2007.4339696
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Random Telegraph Signal Statistical Analysis using a Very Large-scale Array TEG with 1M MOSFETs

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Cited by 41 publications
(43 citation statements)
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“…The wide spread in amplitudes has motivated the development of measurement techniques enabling the fast assessment of the V T change induced by RTN in a large array of similar transistors, using a dedicated test chip lay out (25)(26)(27)(28)). An example of such a test circuit and measurement scheme is represented in Fig.…”
Section: Characterization and Physics Of Rtnmentioning
confidence: 99%
“…The wide spread in amplitudes has motivated the development of measurement techniques enabling the fast assessment of the V T change induced by RTN in a large array of similar transistors, using a dedicated test chip lay out (25)(26)(27)(28)). An example of such a test circuit and measurement scheme is represented in Fig.…”
Section: Characterization and Physics Of Rtnmentioning
confidence: 99%
“…And the vertical-axis and horizontal-axis represent the number of pixels and Digital Number (DN) of NL respectively. Secondly, the noise histogram of a CIS with not only the Gaussian component noise but also the non-Gaussian component noise is calculated based on the work in [4], [11], [14], [28]- [31] and determined by the exponential distribution with two parameter α and β, which is shown in Fig. 10.…”
Section: Rts Noise Modeling In Spatial Domainmentioning
confidence: 99%
“…Random telegraph signal (RTS) is a temporal variation in I ds (V th ) caused by the capture and emission of mobile charge carriers, and it has been studied for over two decades [1][2][3][4][5][6]. Since the amplitude of RTS is proportional to the inverse of the MOSFET channel area [3], memory devices manufactured using the most advanced fabrication technologies are facing severe challenges due to this phenomenon.…”
Section: Introductionmentioning
confidence: 99%
“…Being different from flash memory devices which have thick gate-oxide films, SRAM devices until recently were not considered to be seriously affected by RTS because they utilize thin gate-oxide films in accordance with MOS scaling [7]. However, because V th variation due to RTS eventually (with scaling) will become comparable to that due to random dopant fluctuations (RDF) [5] -a major source of degradation in SRAM characteristics [8] -studies of the impact of RTS on highly scaled SRAM have been reported [9][10][11][12]. Although it is still controversial how much the SRAM minimum operation voltage (V min ) is degraded by RTS, SRAM designers should allocate some design margin for RTS in addition to a (larger) design margin for RDF.…”
Section: Introductionmentioning
confidence: 99%