2005 International Conference on Simulation of Semiconductor Processes and Devices 2005
DOI: 10.1109/sispad.2005.201536
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Performance Enhancement of pMOSFETs Depending on Strain, Channel Direction, and Material

Abstract: In the framework of k.p band calculation, we investigate the modulation of the lowfield mobility and the injection velocity of holes in Si-and Ge-channel pMOSFETs under the uniaxial and the biaxial strain. The contribution of the relaxation time and the conductivity effective mass modulation on the mobility enhancement is separately analyzed. Both the mobility and the injection velocity are enhanced most effectively by the uniaxial compressive strain along the (110) channel.

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Cited by 16 publications
(16 citation statements)
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“…In x Ga 1Àx As (0.53 x 1) with high electron mobility and low effective mass has been demonstrated as n-channel quantum well (QW) device configuration on Si substrate operating at 0.5 V; [3][4][5][6][7] however, the demonstration of a high hole mobility and high-performance p-channel device within the same material system with similar performance remains elusive to date due to low hole mobility in III-V materials. For this reason, the enhancement of carrier transport properties in the channel using high hole mobility channel materials, [8][9][10] different surface orientations to improve the carrier mobility, [11][12][13][14][15][16] strain engineering during growth and process induced strain, 11,[16][17][18] device architecture, [8][9][10] and optimal channel direction [19][20][21][22][23] have been proposed for further enhancement of CMOS devices. For example, Si p-channel metal-oxide semiconductor field-effect transistor (MOSFET) exhibits the highest hole mobility along the h110i channel direction on (110)oriented Si substrates due to the lowest effective mass of holes along the h110i direction.…”
Section: Introductionmentioning
confidence: 99%
“…In x Ga 1Àx As (0.53 x 1) with high electron mobility and low effective mass has been demonstrated as n-channel quantum well (QW) device configuration on Si substrate operating at 0.5 V; [3][4][5][6][7] however, the demonstration of a high hole mobility and high-performance p-channel device within the same material system with similar performance remains elusive to date due to low hole mobility in III-V materials. For this reason, the enhancement of carrier transport properties in the channel using high hole mobility channel materials, [8][9][10] different surface orientations to improve the carrier mobility, [11][12][13][14][15][16] strain engineering during growth and process induced strain, 11,[16][17][18] device architecture, [8][9][10] and optimal channel direction [19][20][21][22][23] have been proposed for further enhancement of CMOS devices. For example, Si p-channel metal-oxide semiconductor field-effect transistor (MOSFET) exhibits the highest hole mobility along the h110i channel direction on (110)oriented Si substrates due to the lowest effective mass of holes along the h110i direction.…”
Section: Introductionmentioning
confidence: 99%
“…[7]. Previous theoretical studies about the mobility of Ge devices focused on strained Ge NMOSFETs [9] and Ge (1 0 0) PMOSFETs [7,10]. A large hole mobility enhancement in uniaxially compressively strained Ge p-channel has been shown in Ref.…”
Section: Introductionmentioning
confidence: 95%
“…4). The band structure at higher energies, which are still within reach of optical phonon energy, continues to change and thus offers higher hole mobility due to reduction in the interband scattering [13].…”
Section: Limits Of Velocity Enhancement In Uniaxially Strained Simentioning
confidence: 99%