This paper describes integration of an advanced composite high-K gate stack (4nm TaSiO x -2nm InP) in the In 0.7 Ga 0.3 As quantum-well field effect transistor (QWFET) on silicon substrate. The composite high-K gate stack enables both (i) thin electrical oxide thickness (t OXE ) and low gate leakage (J G ) and (ii) effective carrier confinement and high effective carrier velocity (V eff ) in the QW channel. The L G =75nm In 0.7 Ga 0.3 As QWFET on Si with this composite high-K gate stack achieves high transconductance of 1750μS/μm and high drive current of 0.49mA/μm at V DS =0.5V.

The current±voltage characteristics of Au/n-GaAs Schottky diodes grown by metal-organic vapor-phase epitaxy on Ge substrates were determined in the temperature range 80±300 K. The zero-bias barrier height for current transport decreases and the ideality factor increases at low temperatures. The ideality factor was found to show the T 0 eect and a higher characteristic energy. The excellent matching between the homogeneous barrier height and the eective barrier height was observed and infer good quality of the GaAs ®lm. No generation±recombination current due to deep levels arising during the GaAs/Ge heteroepitaxy was observed in this study. The value of the Richardson constant was found to be 7.04 A K À2 cm À2 , which is close to the value used for the determination of the zero-bias barrier height. Ó

The performance of strained silicon (Si) as the channel material for today’s metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed.

A.; Madan, H. S.; Kirk, A. P.; et al., "Fermi level unpinning of GaSb (100) using plasma enhanced atomic layer deposition of Al2O3," Appl. Phys. Lett. 97, 143502 (2010); http:// dx

Structural, morphological, and band offset properties of GaAs/Ge/GaAs heterostructures grown in situ on (100), (110), and (111)A GaAs substrates using two separate molecular beam epitaxy chambers, connected via vacuum transfer chamber, were investigated. Reflection high energy electron diffraction (RHEED) studies in all cases exhibited a streaky reconstructed surface pattern for Ge. Sharp RHEED patterns from the surface of GaAs on epitaxial Ge/(111)A GaAs and Ge/(110)GaAs demonstrated a superior interface quality than on Ge/(100)GaAs. Atomic force microscopy reveals smooth and uniform morphology with surface roughness of Ge about 0.2-0.3 nm. High-resolution triple axis x-ray rocking curves demonstrate a high-quality Ge epitaxial layer as well as GaAs/Ge/GaAs heterostructures by observing Pendell€ osung oscillations. Valence band offset, DE v , have been derived from x-ray photoelectron spectroscopy (XPS) data on GaAs/Ge/GaAs interfaces for three crystallographic orientations. The DE v values for epitaxial GaAs layers grown on Ge and Ge layers grown on (100), (110), and (111)A GaAs substrates are 0.23, 0.26, 0.31 eV (upper GaAs/Ge interface) and 0.42, 0.57, 0.61 eV (bottom Ge/GaAs interface), respectively. Using XPS data obtained from these heterostructures, variations in band discontinuities related to the crystallographic orientation have been observed and established a band offset relation of DE V ð111ÞGa > DE V ð110Þ > DE V ð100ÞAs in both upper and lower interfaces. V

The relationship between crystal quality and the properties of indium phosphide nanowires grown on silicon (111) has been studied by transmission electron microscopy, photoluminescence spectroscopy, and photoelectrochemistry. Wires with no defects and with {111} twin boundaries parallel and perpendicular to the growth direction were obtained by metalorganic vapor-phase epitaxy using liquid indium catalyst. Room temperature photoluminescence from the defect-free nanowires is approximately 7 times more intense than that from the wires with twin boundaries. An open-circuit photovoltage of 100 mV is observed for photoelectrochemical cells made with the defect-free nanowires, whereas no photovoltage is recorded for those with twins.

The morphological phase diagram is reported for InP nanostructures grown on InP (111)B as a function of temperature and V/III ratio. Indium droplets were used as the catalyst and were generated in situ in the metalorganic vapor-phase epitaxy reactor. Three distinct nanostructures were observed: wires, cones, and pillars. It is proposed that the shape depends on the relative rates of indium phosphide deposition via the vapor-liquid-solid (VLS) and vapor-phase epitaxy (VPE) processes. The rate of VLS is relatively insensitive to temperature and results in vertical wire growth starting at 350 degrees C. By contrast, the rate of VPE accelerates with temperature and drives the lateral growth of cones at 385 degrees C and then pillars at 400 degrees C.

The barrier height and ideality factor of Au/n-GaAs Schottky diodes grown by metal-organic vapor-phase epitaxy (MOVPE) on undoped and Si-doped n-GaAs substrates were determined in the doping range of 2.5 Â 10 15 -1 Â 10 18 cm À3 at low temperatures. The thermionic-emission zero-bias barrier height for current transport decreases rapidly at concentrations greater than 1 Â 10 18 cm À3. The ideality factor also increases very rapidly at higher concentration and at lower temperature. The results agree quite well with thermionic field emission (TFE) theory. The doping dependence of the barrier height and the ideality factor were obtained in the concentration range of 2.5 Â 10 15 -1.0 Â 10 18 cm À3 and the results are well described using TFE theory. An excellent match between the homogeneous barrier height and the effective barrier height was observed which supports the good quality of the GaAs film. The observed variation in the zero-bias barrier height and the ideality factor can also be explained in terms of barrier height inhomogeneities in the Schottky diode. r