Performance Assessment of Nanoscale Field-Effect Diodes

Abstract

We propose a new structure called a side-contacted field-effect diode (FED). The fabrication of this new structure is simple, and it offers good electrical characteristics. Furthermore, a comprehensive analysis of FEDs is presented. The effect of heavydoping-induced band-gap narrowing on the performance of FEDs is investigated. Our results show that the calculated I on /I off ratio is at least two orders of magnitude larger than that obtained from models neglecting this effect. The figures of merit including intrinsic gate delay time, the energy-delay product, and the subthreshold slope have been studied. Our numerical investigations of the scaling of FEDs indicate that, in the nanometer regime, FEDs have a higher I on /I off ratio. The results demonstrate that FEDs are interesting candidates for future logic applications. Index Terms-Band gap narrowing, double gate, field effect diode (FED), nano transistor, short channel effects, side-contacted.

An Inverter Gate Design Based on Nanoscale S-FED as a Function of Reservoir Thickness

“…In other words, applying reservoirs, the carrier injection from source and drain into the channel, which obstructs the formation of a reverse-biased p-n junction in the channel, is reduced; consequently, the OFF state of S-FED can be achieved. The process of creating side-contacts by utilizing trench technology was described in [12]. In this structure, the source and drain areas can be epitaxially grown [12], [15].…”

“…The process of creating side-contacts by utilizing trench technology was described in [12]. In this structure, the source and drain areas can be epitaxially grown [12], [15].…”

“…The S-FED performance is evaluated in terms of important figures of merit, including transconductance (g m ), gate delay time (τ = CV /I ), energy delay product (EDP) (EDP = CV /I · CV 2 ), and subthreshold slope (SS) [12], [19], [20]. By considering these four metrics, gain, speed, switching energy, and scalability of device can be obtained.…”

“…Fast response time and high I ON /I OFF ratio are the most significant parameters, which are considered for nanoelectronic devices [12]. In S-FED structures, the magnitude order of I ON /I OFF ratio is at least twice higher than that of MOSFETs due to suppressed short-channel effects and also fast response time with similar geometrical parameters [12]- [14].…”

“…In S-FED structures, the magnitude order of I ON /I OFF ratio is at least twice higher than that of MOSFETs due to suppressed short-channel effects and also fast response time with similar geometrical parameters [12]- [14].…”