Performance analysis of SiGe double-gate N-MOSFET

Abstract

The major purpose of this paper is to find an alternative configuration that not only minimizes the limitations of single-gate (SG) MOSFETs but also provides the better replacement for future technology. In this paper, the electrical characteristics of SiGe double-gate N-MOSFET are demonstrated and compared with electrical characteristics of Si double-gate N-MOSFET. Furthermore, in this paper the electrical characteristics of Si double-gate N-MOSFET are demonstrated and compared with electrical characteristics of Si single-gate N-MOSFET. The simulations are carried out for the device at different operational voltages using Cogenda Visual TCAD tool. Moreover, we have designed its structure and studied both characteristics for different voltages namely 0.05, 0.1, 0.5, 0.8, 1 and 1.5 V and characteristics for different voltages namely 0.1, 0.5, 1 and 1.5 V at work functions 4.5, 4.6 and 4.8 eV for this structure. The performance parameters investigated in this paper are threshold voltage, DIBL, subthreshold slope, GIDL, volume inversion and MMCR.

Double Gate MOSFETs: Assessment with Single Gate MOSFETs with Channel Material Configuration, its Structure Orientation and Future Applications

“…V GS ≤ V TH . After providing V GS ≥ V TH , surface potential starts increasing resulting in increase in injection electron exponentially (movement of electron is from source to body in case of N-type channel and movement of electron from body to source in case of P-type channel) is seen because of increase in energy level of electrons [16][17][18][19][20][21][22].…”

Analysis of a high-performance ultra-thin body ultra-thin box silicon-on-insulator MOSFET with the lateral dual-gates: featuring the suppression of the DIBL

“…This is another superior of the new structure over the conventional UTBB SOI structure. (Colinge and Colinge 2002;Singh et al 2017). In Eq.…”

Analysis of Different Configurations of Si1-xGex for Double-Gate MOSFETs and Its Future Applications

“…The MOSFET shown in Figure 1 is a three-terminal voltage-controlled device working like a switch, either fully on at input drive or fully off at zero current by keeping the multiple of supply voltage or itself [2]. Moore's Law shown in Figure 2 elaborates that for a particular area, the number of transistors doubles for nearly 18 months, this leads to acclimation of the multiple numbers of transistors in the defined area by continuously decreasing dimensions (scaling) [3][4][5][6][7]. It is done to accommodate performance with minimum power consumption and power dissipation.…”

“…Here, two gates are available on opposite sides, separated by the gate oxide operating simultaneously. This gives better current in the drain and ensures gate control over the channel and gate coupling [12][13][14].…”