p-Type Ion Implantation in Tensile Si/Compressive Si_0.5Ge_0.5/Tensile Strained Si Heterostructures

Abstract

We present a systematic study on the formation of p-type doped strained Si / strained SiGe heterostructures by B + , BF + 2 and (Si + +B + ) ion implantation and annealing at moderate temperatures. The aim of this paper is to address the challenge of conserving the elastic strain during dopant activation. The most important result is that efficient doping combined with the conservation of strain and a good crystalline quality can only be obtained for BF 2 + implants with 1×10 15 ions/cm 2 and anneals at 650 • C. With these parameters, single crystalline layers with negligible strain relaxation and a sheet resistance of 886 /sq were achieved. The implantation of B + requires higher doses to reach low sheet resistances resulting in low layer quality and higher strain relaxation. Si + pre-implantation yields the lowest sheet resistances, but on the expense of strain (relaxation values over 60%). Finally, the optimized ion implantation / anneal parameters were applied for strained SiGe quantum-well MOSFETs with GdScO 3 high-κ gate dielectric.

Study of dopant activation in biaxially compressively strained SiGe layers using excimer laser annealing

“…This temperature was low enough to ensure the elastic strain conservation in the layers. 14 The electrical characterization of the samples was performed using Van-der-Pauw structures with square geometry, fabricated employing standard optical lithography and reactive ion etching. 9 Crystalline quality of the SiGe layer was investigated by Rutherford Backscattering Spectrometry/ Channeling (RBS/C) using a Tandetron accelerator with 1.4 MeV He þ ions.…”

(Invited) Ternary Rare Earth Based Oxides for Nitride Based Devices

“…So it can be essential to grow orthorhombic layers for microelectronic devices in this (001) growth direction. The crystalline GSO oxides have not been used as gate dielectric while the amorphous GSO has already successfully been integrated as the gate dielectric in MOSFETs on strained silicon on insulator (1, 2), SiGe (3,4), heterojunctions on FETs based on AlGaN/GaN (5), or high electron mobility transistors based on InAlN/GaN (6). Amorphous LLO has been integrated as gate dielectric into various devices such as MOS-HEMT structures (7), quantum well strained SiGe MOSFETs (8) and silicon-on-insulator MOSFETs (9).…”