Hole mobility enhancement in MOS-gated Ge/sub x/Si/sub 1-x//Si heterostructure inversion layers

Garone, P.M.; Venkataraman, V.; Sturm, James C.

doi:10.1109/55.144950

Cited by 106 publications

(28 citation statements)

References 8 publications

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“…This means for circuit design that the best improvement in transistor characteristic can be reached in the gate voltage range near threshold. The maximum mobility values in our present transistors are lower than previously reported mobilities [4][5][6]. This is the result of the very high doping density at the surfaces.…”

Section: Mobilitycontrasting

confidence: 54%

“…The reason is impurity scattering due to high doping concentrations in the channel region, surface scattering at the SiOz interface and the presence of high electric fields in transistor operation. Using a GexSi~_x quantum well for the hole channel, mobility in the strained SiGe layer is higher due to the lower effective mass in the channel [1] and surface scattering is eliminated by the hole confinement in the buried SiGe channel [2][3][4][5][6].…”

Section: Introductionmentioning

confidence: 99%

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Characterization of SiGe quantum-well p-channel MOSFETs

Weidner

Hofmann

et al. 1995

J Mater Sci: Mater Electron

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Geo.~Si0.s Quantum Well p-MOSFETs with verythin gate oxides of 5 nm, 2.5 nm cap-layer and an optional Boron doped delta layer fabricated in a standard 0.6 gm CMOS process have been analysed by C-V and I-V measurements at different temperatures. The maximum low field hole mobility calculated from drain conductance was increased by 70% from 67 cm2/Vs for a reference Silicon epi transistor to 115 cm2/Vs at 300 K and by 100% from 110 cm2/Vs to 220 cm2/Vs at 98 K. These values were obtained at relatively high doping concentrations in the channel, the mobile channel charge was directly obtained from high and low frequency C-V curves. The influence of the net doping density in the channel region on the device characteristics is demonstrated. In the high electric field region the drain current in the saturation region was improved by 20% for the same threshold voltage.

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Section: Mobilitycontrasting

confidence: 54%

Section: Introductionmentioning

confidence: 99%

Characterization of SiGe quantum-well p-channel MOSFETs

Weidner

Hofmann

et al. 1995

J Mater Sci: Mater Electron

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“…This mobility enhancement is excellent compared with those reported by other investigators. 75,76) The subthreshold slopes (about 80 mV/decade at 300 K and about 30 mV/decade at 77 K) of the Si 0:5 Ge 0:5 -channel MOSFET were comparable to those of the MOSFETs without a Si 1Àx Ge x channel. This indicates that defect density in the Si 0:5 Ge 0:5 layer is low.…”

Section: Device Applicationmentioning

confidence: 79%

Atomically Controlled Processing for Group IV Semiconductors by Chemical Vapor Deposition

Murota

Sakuraba

Tillack

2006

jjap

112

153

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One of the main requirements for Si-based ultrasmall devices is atomic-order control of process technology. Here we show the concept of atomically controlled processing for group IV semiconductors based on atomic-order surface reaction control. By ultraclean low-pressure chemical vapor deposition using SiH 4 and GeH 4 gases, high-quality low-temperature epitaxial growth of Si, Ge, and Si 1Àx Ge x with atomically flat surfaces and interfaces on Si (100) is achieved, and atomic-order surface reaction processes on group IV semiconductor surface are formulated based on a Langmuir-type surface adsorption and reaction scheme. In in-situ doped Si 1Àx Ge x epitaxial growth on the (100) surface in a SiH 4 -GeH 4 -dopant (PH 3 , or B 2 H 6 or SiH 3 CH 3 )-H 2 gas mixture, the deposition rate, the Ge fraction and the dopant concentration are explained quantitatively assuming that the reactant gas adsorption/reaction depends on the surface site material and that the dopant incorporation in the grown film is determined by Henry's law. Self-limiting formation of 1-3 atomic layers of group IV or related atoms in the thermal adsorption and reaction of hydride gases on Si(100) and Ge (100) is generalized based on the Langmuir-type model. Si or SiGe epitaxial growth over N, P or B layer already-formed on Si(100) or SiGe(100) surface is achieved. Furthermore, the capability of atomically controlled processing for advanced devices is demonstrated. These results open the way to atomically controlled technology for ultralarge-scale integrations.

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“…In their experiments, Nayak et al extracted the room temperature hole mobility based on a long channel device. The mobility, as obtained from the slope of the saturation transconductance versus gate voltage, of the buried SiGe channel device was 155 cm2/V-s while the bulk-Si control device yielded a mobility of 122 cmZ/V-s. Reported room temperature hole mobility enhancement using the gated SiGe structure has varied from about 30% to 70% (depending upon Ge mole fraction) over its Si counterpart [12,28,29,30]. Additional improvement in channel mobility has been observed in SiGe p-MOS devices built on SOI.…”

Section: 3 Gated Si/sit_ Xgex Heterostructuresmentioning

confidence: 99%

SiGe band engineering for MOS, CMOS and quantum effect devices

Wang

Thomas

Tanner

1995

J Mater Sci: Mater Electron

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In this paper, we review recent progress in SiGe MOS technology. Progress in high mobility p-channel and n-channel devices will be presented as well as some of the materials and processing issues related to the fabrication of these heterostructures. In addition, we will present an outlook on the integration of these devices to complimentary MOS (CMOS) based on Si on Insulator technology (SOl). New directions of novel devices utilizing selective epitaxial growth and the integration of Si/Ge superlattices for enhanced performance in field effect transistors are described. Finally, we will examine some of the materials challenges of integrating SiGe technologies with current CMOS production processes.

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Hole mobility enhancement in MOS-gated Ge/sub x/Si/sub 1-x//Si heterostructure inversion layers

Cited by 106 publications

References 8 publications

Characterization of SiGe quantum-well p-channel MOSFETs

Characterization of SiGe quantum-well p-channel MOSFETs

Atomically Controlled Processing for Group IV Semiconductors by Chemical Vapor Deposition

SiGe band engineering for MOS, CMOS and quantum effect devices

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