High-Density Silicon Nanocrystal Formed on Nitrided Tunnel Oxide for Nonvolatile Memory Application

Abstract

Si nanocrystal with a high density of 5.1 ϫ 10 11 cm −2 and an average size of 7.2 nm has been achieved on the NH 3 -nitrided tunnel oxide, and the density is higher than that formed on the untreated tunnel oxide by a factor of 3.2. The higher density obtained by this technique is attributed to the lower activation energy for the Si nanocrystal nucleation growth on the nitrogen-containing surface of the nitrided tunnel oxide. The memory device with such a high nanocrystal density demonstrates a 1.79 V threshold voltage shift by programming at 10 V for 10 ms and a negligible memory window degradation up to 10 6 program/erase cycles. The good charge storage capability is evidenced by an extrapolated 10 year memory window of 0.92 V at 150°C.Because of the widespread adoption in consumer electronics and the growing demand in personal computer applications for nonvolatile memory, it has drawn intensive research interest in further scaling the memory cell size and reducing the operation voltage of the current floating-gate-based nonvolatile memory. With the mutually isolated and discrete charge trapping sites, nanocrystal memory has been regarded as one of the most promising flash memory technologies due to its better scalability, lower program/erase voltage, and enhanced endurance performance. In addition, compared with polycrystalline Si-oxide-nitride-oxide-Si ͑SONOS͒, the other widely investigated charge-trapping memory, it reveals several merits in more controllable trap sites and larger trapping probability. 1 Owing to the fully compatible process of incumbent ultralarge-scale integration technology, Si nanocrystal memory has received much attention for years. 2-12 Nevertheless, Si nanocrystal memory still exhibits a limited retention and a small memory window that would restrict its potential application for nonvolatile memory. To address this issue, many research groups have proposed structures including highpermittivity interpoly dielectric, 2 highly field-sensitive nitrideoxide-nitride as the tunnel barrier, 3 doubly stacked Si nanocrystal, 4 surface-nitrided Si nanocrystal, 5 and hybrid Si nanocrystal Si nitride memory. 6 However, few reports discuss the approach to form highdensity Si nanocrystal, which is essential to further boost the program/erase speed and memory window. Si nanocrystal fabricated by ion implantation of excess Si into the oxide and subsequent thermal annealing is a straightforward method to control the nanocrystal density; 7 unfortunately, it would compromise the tunnel oxide quality. Although high-density Si nanocrystal formed by low-energy SiH 4 plasma immersion ion implantation seems to be practically feasible, 8 it necessitates a different type of ion implantation tool to implement. In this article, with the existent standard process tools in a mass production fabrication, high-density Si nanocrystal formation has been achieved on the appropriately nitrided tunnel oxide. The large memory window with a good endurance performance from the electrical characterization of the memory device...

Flash Memory Featuring Low-Voltage Operation by Crystalline ZrTiO4 Charge-Trapping Layer

“…Figure 3a shows the bi-directional capacitance-voltage (C-V) hysteresis curves for memory devices with N 2 O plasma-treated ZTO as the CTL by applying different sweeping voltages measured at 1 MHz. As the sweeping voltage increases from ±5 V, ±7 V and ±10 V, the hysteresis memory window (flatband voltage shift, ΔV FB ) increases from 0.5 V, 3.3 V, and 6.9 V. The counterclockwise hysteresis is attributed to the injection of deep-inversion electrons from the substrate 32 . Figure 3b summarizes the dependence of sweeping voltage on hysteresis memory window for ZTO with various treatments.…”