Formation of strain-induced quantum dots in gated semiconductor nanostructures

Thorbeck, Ted; Zimmerman, Neil M.

doi:10.1063/1.4928320

Cited by 72 publications

(79 citation statements)

References 44 publications

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“…Some silicides, when oxidized, form metallic oxides, while others form SiO 2 [53]. Devices made in this way will help to reduce the resistance of gates made of polySi so that they can be operated at higher frequencies and may reduce the tendency of metallic gates to produce strain-induced barriers [54]. If those devices are also immune to the effects of charge offset drift, they may represent a large advance in the capability of current all-silicon based devices.…”

Section: Discussionmentioning

confidence: 99%

Stability of Single Electron Devices: Charge Offset Drift

Stewart

Zimmerman

2016

Applied Sciences

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Single electron devices (SEDs) afford the opportunity to isolate and manipulate individual electrons. This ability imbues SEDs with potential applications in a wide array of areas from metrology (current and capacitance) to quantum information. Success in each application ultimately requires exceptional performance, uniformity, and stability from SEDs which is currently unavailable. In this review, we discuss a time instability of SEDs that occurs at low frequency ( 1 Hz) called charge offset drift. We review experimental work which shows that charge offset drift is large in metal-based SEDs and absent in Si-SiO 2 -based devices. We discuss the experimental results in the context of glassy relaxation as well as prospects of SED device applications.

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Section: Discussionmentioning

confidence: 99%

Stability of Single Electron Devices: Charge Offset Drift

Stewart

Zimmerman

2016

Applied Sciences

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“…Aluminium gate electrodes were fabricated using multi-layer gate stack technology 34 . Quantum dots D1 and D2 are formed underneath gates G1 and G2, however the exact dot centre positions can be influenced by local strain fields in the device 35 . The tunnel rate between the dots and the reservoir RG (yellow) can be modified by adjusting the voltages on G3 and G4 (grey).…”

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confidence: 99%

Fidelity benchmarks for two-qubit gates in silicon

Huang

Yang

Chan

et al. 2019

Nature

379

383

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Universal quantum computation will require qubit technology based on a scalable platform, together with quantum error correction protocols that place strict limits on the maximum infidelities for one-and two-qubit gate operations 1,2 . While a variety of qubit systems have shown high fidelities at the one-qubit level 3-9 , superconductor technologies have been the only solidstate qubits manufactured via standard lithographic techniques which have demonstrated twoqubit fidelities near the fault-tolerant threshold 5 . Silicon-based quantum dot qubits are also amenable to large-scale manufacture and can achieve high single-qubit gate fidelities (exceeding 99.9 %) using isotopically enriched silicon 10-12 . However, while two-qubit gates have been demonstrated in silicon 13-15 , it has not yet been possible to rigorously assess their fidelities using randomized benchmarking, since this requires sequences of significant numbers of qubit operations ( 20) to be completed with non-vanishing fidelity. Here, for qubits encoded on the electron spin states of gate-defined quantum dots, we demonstrate Bell state tomography with fidelities ranging from 80 % to 89 %, and two-qubit randomized benchmarking with an average Clifford gate fidelity of 94.7 % and average Controlled-ROT (CROT) fidelity of 98.0 %. These fidelities are found to be limited by the relatively slow gate times employed here compared with the decoherence times T * 2 of the qubits. Silicon qubit designs employing fast gate operations based on high Rabi frequencies 16-18 , together with advanced pulsing techniques 19 , should therefore enable significantly higher fidelities in the near future.Silicon provides an ideal environment for spin qubits thanks to its compatibility with industrial manufacturing technologies and the near-perfect nuclear-spin vacuum that isotopically enriched 28 Si provides 10,11 . Qubits can be encoded directly on the spins of individual nuclei, donor-bound electrons, or electrons confined in gatedefined quantum dots, or they can be encoded in subspaces provided by two or more spins 12 . Electrostatic gate electrodes allow initialization, readout 23 and, in some cases, manipulation of qubits 24 to be implemented with local electrical pulses. For qubits encoded on single spins, one-qubit gates can be driven using an AC magnetic field to perform electron spin resonance (ESR) directly 8,25 , through an AC electric field produced by a gate electrode combined with the magnetic field gradient from an on-chip micro-magnet 16,17,26 , or with an AC electric field acting on the spin-orbit field 27-29 . In enriched 28 Si devices such one-qubit gates have attained fidelities of 99.9 % or above 18,30,31 .Two-qubit gates, required to complete the universal gate set, are commonly implemented in spin systems as the √ SW AP 24,32 , the C-Phase 13,14 or the CROT 13,15 . While the √ SW AP and the C-Phase gates require fast temporal control of the exchange interaction J, accurately synchronized with spin resonance pulses, the CROT can also be implemented wit...

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“…disorder or strain48. In case of the latter the conduction or valence band is modulated by strain, induced by the difference in thermal expansion coefficients between the silicon and the aluminum gates in the heterostructure.…”

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confidence: 99%

Passivation and characterization of charge defects in ambipolar silicon quantum dots

Spruijtenburg¹,

Amitonov²,

Mueller³

et al. 2016

Sci Rep

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In this Report we show the role of charge defects in the context of the formation of electrostatically defined quantum dots. We introduce a barrier array structure to probe defects at multiple locations in a single device. We measure samples both before and after an annealing process which uses an Al2O3 overlayer, grown by atomic layer deposition. After passivation of the majority of charge defects with annealing we can electrostatically define hole quantum dots up to 180 nm in length. Our ambipolar structures reveal amphoteric charge defects that remain after annealing with charging energies of 10 meV in both the positive and negative charge state.

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Formation of strain-induced quantum dots in gated semiconductor nanostructures

Cited by 72 publications

References 44 publications

Stability of Single Electron Devices: Charge Offset Drift

Stability of Single Electron Devices: Charge Offset Drift

Fidelity benchmarks for two-qubit gates in silicon

Passivation and characterization of charge defects in ambipolar silicon quantum dots

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