We replace the established aluminium gates for the formation of quantum dots in silicon with gates made from palladium. We study the morphology of both aluminium and palladium gates with transmission electron microscopy. The native aluminium oxide is found to be formed all around the aluminium gates, which could lead to the formation of unintentional dots. Therefore, we report on a novel fabrication route that replaces aluminium and its native oxide by palladium with atomic-layer-deposition-grown aluminium oxide. Using this approach, we show the formation of low-disorder gate-defined quantum dots, which are reproducibly fabricated. Furthermore, palladium enables us to further shrink the gate design, allowing us to perform electron transport measurements in the few-electron regime in devices comprising only two gate layers, a major technological advancement. It remains to be seen, whether the introduction of palladium gates can improve the excellent results on electron and nuclear spin qubits defined with an aluminium gate stack.
In this letter we report single-hole tunneling through a quantum dot in a two-dimensional hole gas, situated in a narrow-channel field-effect transistor in intrinsic silicon. Two layers of aluminum gate electrodes are defined on Si/SiO2 using electron-beam lithography. Fabrication and subsequent electrical characterization of different devices yield reproducible results, such as typical MOSFET turn-on and pinch-off characteristics. Additionally, linear transport measurements at 4 K result in regularly spaced Coulomb oscillations, corresponding to single-hole tunneling through individual Coulomb islands. These Coulomb peaks are visible over a broad range in gate voltage, indicating very stable device operation. Energy spectroscopy measurements show closed Coulomb diamonds with single-hole charging energies of 5-10 meV, and lines of increased conductance as a result of resonant tunneling through additional available hole states.In order for sufficient coherent operations to be performed in a proposed quantum computer [1], the quantum states of the corresponding qubits are required to be long-lived. In the scheme proposed by Loss and DiVincenzo [2], quantum logic gates perform operations on coupled spin states of single electrons in neighboring quantum dots. Most experiments have focused on quantum dots formed in III-V semiconductors, especially GaAs [3, 4]; however, electron spin coherence in those materials is limited by hyperfine interactions with nuclear spins and spin-orbit coupling. Group IV materials are believed to have long spin lifetimes because of weak spin-orbit interactions and the predominance of spin-zero nuclei. This prospect has stimulated significant experimental effort to isolate single charges in carbon nanotubes [5,6], Si/SiGe heterostructures [7,8], Si nanowires [9], planar Si MOS structures [10], and dopants in Si [11][12][13]. Silicon not only holds promise for very long coherence times [14], but also for bringing scalability of quantum devices one step closer, and has thus attracted much attention for quantum computing purposes [15,16].Recently, coherent driven oscillations of individual electron and nuclear spins in silicon were reported [17,18]. The spin resonance was magnetically driven by sending alternating currents through a nearby microwave line. A technologically more attractive way is electric-field induced electron spin resonance, as demonstrated in quantum dots made in GaAs/AlGaAs heterostructures [19][20][21], InAs nanowires [22], and InSb nanowires [23]. Electrical control of single spins requires mediation by either hyperfine or spin-orbit interaction. Although the latter is too weak for electrically driven spin resonance of electrons in silicon, the spin-orbit interaction for holes may well facilitate hole spin resonance by means of electric fields.
In this Report we show the role of charge defects in the context of the formation of electrostatically defined quantum dots. We introduce a barrier array structure to probe defects at multiple locations in a single device. We measure samples both before and after an annealing process which uses an Al2O3 overlayer, grown by atomic layer deposition. After passivation of the majority of charge defects with annealing we can electrostatically define hole quantum dots up to 180 nm in length. Our ambipolar structures reveal amphoteric charge defects that remain after annealing with charging energies of 10 meV in both the positive and negative charge state.
We report electrical transport measurements on a gate-defined ambipolar quantum dot in intrinsic silicon. The ambipolarity allows its operation as either an electron or a hole quantum dot of which we change the dot occupancy by 20 charge carriers in each regime. Electron-hole confinement symmetry is evidenced by the extracted gate capacitances and charging energies. The results demonstrate that ambipolar quantum dots offer great potential for spin-based quantum information processing, since confined electrons and holes can be compared and manipulated in the same crystalline environment.
We describe important considerations to create top-down fabricated planar quantum dots in silicon, often not discussed in detail in literature. The subtle interplay between intrinsic material properties, interfaces and fabrication processes plays a crucial role in the formation of electrostatically defined quantum dots. Processes such as oxidation, physical vapor deposition and atomic-layer deposition must be tailored in order to prevent unwanted side effects such as defects, disorder and dewetting. In two directly related manuscripts written in parallel we use techniques described in this work to create depletion-mode quantum dots in intrinsic silicon, and low-disorder silicon quantum dots defined with palladium gates. While we discuss three different planar gate structures, the general principles also apply to 0D and 1D systems, such as self-assembled islands and nanowires. 1 arXiv:1709.08866v3 [cond-mat.mes-hall] Feb 2018Dealing with the fragility of the quantum coherent state is one of the key issues on the road to meet the limits posited by quantum computation schemes 1 . It is the coupling of quantum states to states in an unknown environment which is the driver for decoherence. The properties of the environment therefore dictate the performance of a quantum bit (qubit).Creating qubits in the solid state means that the environment consists of many different materials and structures used in device construction. give rise to interactions detrimental to qubit creation and readout.The hyperfine interaction of nuclear spins in the host material and the qubit is one such effect. The non-zero-spin isotopes in a material create a nuclear-spin-bath and cause decoherence of the quantum state. This is the motivation for the use of isotopically purified silicon as a host material for spin qubits 9,10 . The purified silicon, now containing predomi-Si, results in a zero-nuclear-spin isotope system, and eliminates the fluctuations in the spin bath, which are detrimental.Field noise, such as charge-and spin-noise 11 can also influence the lifetime of the quantum state. One strategy to deal with these fluctuations is to tune the quantum dots to certain regimes in phase space where the energy levels of interest are insensitive to these fields. This can happen in the clock transition of Bi dopants in Si 12 , by dressing qubits and tuning them appropriately 13 , or for hybrid quantum dots. 14 Another effect that can influence quantum states are fluctuations in the electrochemical potential at longer timescales. These have been shown to occur due to charge offsets fluctuating over time in glassy media and their intrinsic two-level systems (TLS). 15,16Finally, unintentional quantum dots, charge traps, or charge defects can influence a de- This article has the intention to provide a foothold for entrants in the field (e.g. starting graduate students) and elucidate mechanisms that need to be taken into account when designing and fabricating these devices in the solid state. It can be read back to front, and may also serve well ...
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