Failure Defects Observed in Post-Breakdown High-κ/Metal Gate Stack Mosfet

Abstract

Failure defects associated with breakdown of the HfO 2 /TaN/TiN gate stack metal-oxide-semiconductor field effect transistor (MOSFET) are studied. Very fast degradation rate in the gate leakage current is attributed to gate material filamentation of the breakdown path, leading to various degrees of severity in microstructural damages in the narrow width MOSFET structure. This observation is different from that reported for the polycrystalline-silicon (poly-Si) gate MOSFET. On the other hand, some common failure mechanisms driven by gate dielectric breakdown, such as dielectricbreakdown-induced epitaxy (DBIE) and silicide migration i.e. dielectric-breakdown-induced migration (DBIM) [1-6], previously observed in poly-Si gate MOSFET, are still found in metal gate MOSFET.[Keywords: metal-like filament, breakdown path, localized amorphization, metal/high-κ delamination, dielectric-breakdowninduced epitaxy, dielectric-breakdown-induced migration]

The “buffering” role of high-к in post breakdown degradation immunity of advanced dual layer dielectric gate stacks

“…The phase of post-BD may in itself include various degradation mechanisms depending on the dielectric and gate material [7]. Some of these include digital and analog wear-out of the percolation path [8], metal filamentation (Ni, Ta-based gates) [9,10], dielectric breakdown induced epitaxy (DBIE) [11] and migration of contact metal from the source / drain ends into the channel causing a short [12,13]. Although SBD and post-BD are phenomena that have been extensively studied both from a statistical viewpoint [14] - [16] and electrical / physical analysis perspective [17] - [19] for SiO 2 /SiON and HK-IL stacks, the key limitation is that in most cases, the algorithm used to accelerate the breakdown is unable to accurately capture the transient between the percolation event and the post-BD phase, where we observe the physical morphological changes in the dielectric at the BD spot.…”

Statistical characterization and reliability modeling of novel high-K gate dielectric stacks

“…Various gate stacks were studied with SiO 2 , HfSiON and HfO 2 as the dielectric and polysilicon (poly-Si), NiSi, TiN and TaN as the gate electrode materials. As reported in Chapter 2, the failure mechanism at HBD generally involves metal filament formation [145] or silicon epitaxy from the substrate (DBIE) [115]. Interestingly, for the case of NiSi electrode devices, irrespective of the dielectric material, we observed a significant recovery of leakage current from the milliamps range all the way to the sub-µA range, as shown in Fig.…”

“…While DBIE is a universal defect observed across all generations of gate stacks using the Si as a substrate, an additional failure mechanism is observed in metal gate (NiSi, TiN, TaN) stacks which involves migration of the metal spiking or punching through into the oxide causing an ohmic metallic short between the gate and channel. This process is referred to as filamentation [145] and it has been observed in Ni [146] (Fig. 2.13(c)) and Ta-based [62]…”

“…2.13(e)). This is sometimes referred to as dielectric breakdown induced metal migration (DBIM) [145] (Fig. 2.13(f)).…”

Distinguishing conductive filament and non-localized gate conduction in resistive switching devices

“…RRAM are based on Resistive Switching (RS) phenomenon [2][3][4], traditionally studied in Metal-Insulator-Metal and Metal-Insulator-Semiconductor (MIMIMIS) structures, and consists in the switching between two different resistive states of the dielectric by applying the adequate voltages to the structure. These two resistive states are associated to the formation and rupture of a localized conductive filament (CF) through the dielectric [5][6][7]. When the CF is completely formed, gate and substrate are connected and a large amount of current can flow through the structure, a low resistance state (LRS) of the dielectric has been reached.…”