Resistive switching memory (RRAM) is among the most mature technologies for next generation storage class memory with low power, high density, and improved performance. The biggest challenge toward industrialization of RRAM is the large variability and noise issues, causing distribution broadening which affects retention even at room temperature. Noise and variability can be addressed by enlarging the resistance window between lowresistance state and high-resistance state, which requires a proper engineering of device materials and electrodes. This paper presents an RRAM device technology based on silicon oxide (SiO x ), showing high resistance window thanks to the high bandgap in the silicon oxide. Endurance, retention, and variability show excellent performance, thus supporting SiO x as a strong active material for developing future generation RRAMs.Index Terms-Cross point array, memory reliability, nonvolatile memory technology, resistive switching memory (RRAM), silicon oxide, storage class memory (SCM).

Resistive switching memory (RRAM) is among the most promising technologies for storage class memory (SCM) and embedded nonvolatile memory (eNVM). Feasibility of RRAM as SCM and/or embedded memory requires large on/off ratio, good endurance, high retention, and the availability of a robust select element for crossbar array integration. This work presents Ti/SiOx RRAM with high on/off ratio (>104), good endurance (>107), high uniformity and strong retention (260°C for 1 hour), thanks to the high SiOx band gap. Ag/SiOx devices show volatile switching with high on/off ratio (> 107) and bidirectional operation applicable to select devices in crossbar arrays

The cross-point architecture for memory arrays is widely considered as one of the most attractive solutions for storage and memory circuits thanks to simplicity, scalability, small cell size, and consequently high density and low cost. Cost-scalable vertical 3-D cross-point architectures, in particular, offer the opportunity to challenge Flash memory with comparable density and cost. To develop scalable cross-point arrays, however, select devices with sufficient ON-OFF ratio, current capability, and endurance must be available. This paper presents a select device technology based on volatile resistive switching withCu and Ag top electrode and silicon oxide (SiO x ) switching materials. The select device displays ultrahigh resistance window and good current capability exceeding 2 MAcm −2 . Retention study shows a stochastic voltage-dependent ON-OFF transition time in the 10 µs-1 ms range, which needs to be further optimized for fast memory operation in storage class memory arrays. Index Terms-Conductive bridge RAM (CBRAM), cross-point array, select device, silicon oxide, storage class memory, volatile switching. I. INTRODUCTIONC ROSS-POINT arrays represent a promising architecture to compete with Flash memories in terms of density and bit cost. In a cross-point array, every memory element is located at the intersection between a row and a column electrode wire, therefore achieving a minimum device size of 4F 2 , where F is the minimum lithographic feature. Cross-point arrays were proposed for resistive switching (RS) memory (RRAM) [1]-[3] and phase change memory (PCM) [4], [5], both benefitting from a relatively large resistance window and

The resistive switching phenomenon is analyzed using a purposely developed setup which allows fast ramped voltages and measurements in the time domain. Taking advantage of these capabilities, the Set and Reset processes in Ni/HfO 2 structures have been studied under a large range of voltage ramp speeds. The results obtained show that Set and Reset voltages increase with voltage ramp speed. The use of time domain measurements has allowed concluding that a critical energy is needed to trigger the Set and Reset processes, independently of the biasing conditions.

An in-depth analysis including both simulation and experimental characterization of Resistive RAMs (RRAMs) with dielectric stacks composed of two layers of HfO2 and Al2O3 stacked in different order is presented. The simulator, that includes the electrodes in the simulation domain, solves the 3D heat equation and calculates the device current. The results are employed to analyze thermal effects in bilayer HfO2 and Al2O3-based RRAMs with electrodes of Ni and Si-n+ during resistive switching (RS) operation. According to our simulations and the experimental data, the narrow part of the conductive filaments (CF) is formed in the HfO2 layer in all the cases and, therefore, no important differences are found in terms of reset voltage if the oxide stack order is changed with respect to the electrodes. This result is attributed to the fact that the heat flux in the Al2O3 is higher than