2013 IEEE 63rd Electronic Components and Technology Conference 2013
DOI: 10.1109/ectc.2013.6575589
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Fabrication and testing of thin silicon interposers with multilevel frontside and backside metallization and Cu-filled TSVs

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Cited by 10 publications
(6 citation statements)
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“…Si was the initial material used for interposers because of its coefficient of thermal expansion (CTE) match to the Si chip and the familiarity of wafer fabrication facilities in Si processing. 1,2 Recently, glass has gained attention as a candidate interposer material. [3][4][5][6] The CTE of borosilicate glass, 3.2, is reasonably close to that of Si, 2.9, and a wide range of CTE's is available by changing the glass composition.…”
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confidence: 99%
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“…Si was the initial material used for interposers because of its coefficient of thermal expansion (CTE) match to the Si chip and the familiarity of wafer fabrication facilities in Si processing. 1,2 Recently, glass has gained attention as a candidate interposer material. [3][4][5][6] The CTE of borosilicate glass, 3.2, is reasonably close to that of Si, 2.9, and a wide range of CTE's is available by changing the glass composition.…”
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confidence: 99%
“…10,11 Models have been developed to explain the preferential plating at the bottoms of 'blind' features through the interplay of "accelerators" such as SPS and suppressors such as PEG. [12][13][14] In the case of Si, through vias (TSV) have been generated by first filling vias as blind vias, then thinning the back side of the wafer by CMP until the bottoms of the filled vias are intersected, thereby producing filled TSVs 2 or by first sealing one end of the TSVs then filling them as blind vias. 1 In the case of glass, where through-holes may be formed directly into the glass without the need for mechanical thinning, it is our intent to develop Cu plating processes to fill these holes as TGVs (open on both ends) instead of as blind vias.…”
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confidence: 99%
“…In recent years interest has developed in the use of interposers in microelectronics packaging to accommodate increasing packaging density. [1][2][3] Silicon has been favored because of its match to the coefficient of thermal expansion (CTE) of integrated circuit chips and its compatibility with fabrication processes in integrated circuit manufacturing facilities. More recently interest has been shown in the use of glass as an interposer material for several reasons including its low cost, availability in large sizes including flexible rolls, high dielectric strength, lack of need for a barrier layer (as for Si), adjustable CTE, and prospects for higher frequency operation.…”
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confidence: 99%
“…Further details of the interposer fabrication and testing are provided in other publications. [14,15] …”
Section: Tsv Processing and Interposer Fabricationmentioning
confidence: 99%