Evolution of analog circuits on field programmable transistor arrays

Stoica, Adrian; Keymeulen, Didier; Zebulum, R.; Thakoor, A. P.; Daud, T.; Klimeck, Gerhard; Tawel, R.; Dương, Vũ

doi:10.1109/eh.2000.869347

Cited by 79 publications

(32 citation statements)

References 8 publications

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“…In view of the above, PAMA presents desirable characteristics when compared to other reconfigurable platforms designed to intrinsically evolve analog circuits [3] [4]. Those characteristics have been contrasted in a previous work [6].…”

Section: Important Issuesmentioning

confidence: 99%

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Intrinsic Evolution of Analog Circuits on a Programmable Analog Multiplexer Array

Amaral

Santini

et al. 2004

Computational Science - ICCS 2004

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Abstract. This work discusses an Evolvable Hardware (EHW) platform for the intrinsic evolution of analog electronic circuits. The EHW analog platform, named PAMA-NG (Programmable Analog Multiplexer Array-Next Generation), is a reconfigurable platform that consists of integrated circuits whose internal connections can be programmed by Evolutionary Computation techniques, such as Genetic Algorithms (GAs), to synthesize circuits. The PAMA-NG is classified as Field Programmable Analog Array (FPAA). FPAAs are reconfigurable devices that will become the building blocks of a forthcoming class of hardware, with the important features of self-adaptation and self-repairing, through automatic reconfiguration. The PAMA-NG platform architectural details, concepts and characteristics are discussed. Two case studies, with promising results, are described: a logarithmic amplifier and an S membership function circuit of a fuzzy logic controller.

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Section: Important Issuesmentioning

confidence: 99%

“…PAMA-NG is classified as an FPAA [2][3] [4] and supplies an environment to evolve generic analog circuits based on discrete components, without the need of simulators, i.e. intrinsic evolution.…”

Section: Introductionmentioning

confidence: 99%

Intrinsic Evolution of Analog Circuits on a Programmable Analog Multiplexer Array

Amaral

Santini

et al. 2004

Computational Science - ICCS 2004

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“…A small number of capacitors are included on-chip, but resistors are synthesized using the MOSFET transistors. FPAAs are available as commercial off-the-shelf (COTS) devices (e.g., see [3]); the FPTA was fabricated for NASA's Jet Propulsion Laboratory and is currently only available for research studies [4].…”

Section: Introductionmentioning

confidence: 99%

On the Practicality of Using Intrinsic Reconfiguration for Fault Recovery

Greenwood

2005

IEEE Trans. Evol. Computat.

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Evolvable hardware combines the powerful search capability of evolutionary algorithms with the flexibility of reprogrammable devices, thereby providing a natural framework for reconfiguration. This framework has generated an interest in using evolvable hardware for fault-tolerant systems because reconfiguration can effectively deal with hardware faults whenever it is impossible to provide spares. But systems cannot tolerate faults indefinitely, which means reconfiguration does have a deadline. The focus of previous evolvable hardware research relating to fault-tolerance has been primarily restricted to restoring functionality, with no real consideration of time constraints. In this paper we are concerned with evolvable hardware performing reconfiguration under deadline constraints. In particular, we investigate reconfigurable hardware that undergoes intrinsic evolution. We show that fault recovery done by intrinsic reconfiguration has some restrictions, which designers cannot ignore.

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“…Secondly, in order to evaluate a complex candidate circuit, a relatively complex procedure has to be undertaken -which is time consuming and makes the evolutionary search very slow. Stoica et al noted [12]: "From the evolvable hardware perspective, it is interesting to have programmable granularity, allowing the sampling of novel architectures together with the possibility of implementing standard ones. The optimal choice of elementary block type and granularity is task dependent."…”

Section: Introductionmentioning

confidence: 99%

Reducing the number of transistors in digital circuits using gate-level evolutionary design

Gajda

Sekanina

2007

Proceedings of the 9th Annual Conference on Genetic and Evolutionary Computation

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This paper shows that the evolutionary design of digital circuits which is conducted at the gate level is able to produce human-competitive circuits at the transistor level. In addition to standard gates, we utilize unconventional gates (such as the NAND/NOR gate and NOR/NAND gate) that consist of a few transistors but exhibit non-trivial 3-input logic functions. Novel implementations of adders and majority circuits evolved using these gates contain fewer transistors than the smallest existing implementations of these circuits. Moreover, it was shown that the use of these gates significantly improves the success rate of the search process.

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Evolution of analog circuits on field programmable transistor arrays

Cited by 79 publications

References 8 publications

Intrinsic Evolution of Analog Circuits on a Programmable Analog Multiplexer Array

Intrinsic Evolution of Analog Circuits on a Programmable Analog Multiplexer Array

On the Practicality of Using Intrinsic Reconfiguration for Fault Recovery

Reducing the number of transistors in digital circuits using gate-level evolutionary design

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