No abstract

Abstract-Multifunctional digital circuits are circuits composed of polymorphic (multifunctional) gates. In addition to its standard logic function (such as NAND), a polymorphic gate exhibits another logic function (such as NOR) which is activated under a specific condition, for example, when Vdd, temperature or illumination reaches a certain level. This paper describes the evolutionary design of multifunctional combinational circuits at the gate level using a circuit simulator and in a field programmable gate array (FPGA). The FPGAbased implementation exhibits a significant speedup against a highly optimized software simulator.

No abstract

No abstract

This paper shows that the evolutionary design of digital circuits which is conducted at the gate level is able to produce human-competitive circuits at the transistor level. In addition to standard gates, we utilize unconventional gates (such as the NAND/NOR gate and NOR/NAND gate) that consist of a few transistors but exhibit non-trivial 3-input logic functions. Novel implementations of adders and majority circuits evolved using these gates contain fewer transistors than the smallest existing implementations of these circuits. Moreover, it was shown that the use of these gates significantly improves the success rate of the search process.

No abstract

No abstract

A new method is proposed to minimize the number of gates in combinational circuits using Cartesian Genetic Programming (CGP). We show that when the selection of the parent individual is performed on basis of its functionality solely (neglecting thus the phenotype size) smaller circuits can be evolved even if the number of gates is not considered by a fitness function. This phenomenon is confirmed on the evolutionary design of combinational multipliers.