Gate-level optimization of polymorphic circuits using Cartesian Genetic Programming

Gajda, Zbysek; Sekanina, Lukáš

doi:10.1109/cec.2009.4983133

Cited by 14 publications

(6 citation statements)

References 19 publications

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“…But in 2009, Gajda and Sekanina propose another approach based on conventional digital design techniques [13]. The main issue is how to include polymorphic gates to conventional circuits.…”

Section: Polymorphic Electronicsmentioning

confidence: 99%

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Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles

Růžička

Simek

2011

2011 14th Euromicro Conference on Digital System Design

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The paper presents a new design approach to digital circuits that provides for an increased chip operation reliability from temperature point of view. The key aspect behind the proposed method of approach is to avoid chip overheating due to special design and subsequent integration of dedicated circuit controller. Such element is blended seamlessly with the surrounding circuitry and posses the ability to reconfigure itself when the temperature of the chip goes beyond defined temperature boundary. After the end of reconfiguration phase, the controller ensures only indispensable function. By this arrangement, the power and heat dissipation of the circuit is reduced until the chip temperature falls again under certain level. When the chip is cooled down appropriately, the controller returns back to normal operating mode automatically. The proposed approach utilises principles of polymorphic digital circuits which embrace smart and fast reconfiguration, compact and costeffective design with embedded sensors, where the aim is to ensure overall system stability and in the same time increase its dependability.

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“…But in 2009, Gajda and Sekanina propose another approach based on conventional digital design techniques [13]. The main issue is how to include polymorphic gates to conventional circuits.…”

Section: Polymorphic Electronicsmentioning

confidence: 99%

“…Experiments with first fabricated polymorphic gate [11] show that there is a capability of reliable thermal sensitivity [12]. Using principles proposed in [6] and [13], a design approach for temperature-aware digital circuit controllers is proposed and described in this paper.…”

Section: Introductionmentioning

confidence: 99%

Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles

Růžička

Simek

2011

2011 14th Euromicro Conference on Digital System Design

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“…But in 2009, Gajda and Sekanina propose another approach based on conventional digital design techniques [8]. The main issue is how to include polymorphic gates to conventional circuits.…”

Section: Polymorphic Electronicsmentioning

confidence: 99%

Gracefully Degrading Circuit Controllers Based on Polytronics

Růžička

2010

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools

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This paper proposes utilisation of polymorphic electronics to design digital circuit controllers that gracefully degrades when some inconvenient situation arise, e.g. when battery goes low or a chip temperature cross some safe level. In proposed approach, the next state logic of the controller is designed using polymorphic gates. Polymorphic gates exhibit two or more logic functions in according to a specific condition (e.g. Vdd level or special signals). This allows to make a smart reconfiguration of the circuit. An algorithm for designing gracefully degrading circuit controllers using polymorphic gates is proposed in the paper. Purpose of the algorithm is demonstrated on an example of a controller. This controller was physically realised and its functionality (especially in transient state) was verified.

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“…CGP is capable of evolving very area-efficient multifunctional circuits, however, the approach evaluating 2 n input assignments for n-input circuits is not scalable [14], [5], [15]. Only small polymorphic FIR filters were designed using this method [16].…”

Section: Multifunctional Circuitsmentioning

confidence: 99%

Two-step evolution of polymorphic circuits for image multi-filtering

Sekanina¹,

Salajka²,

Vašíček³

2012

2012 IEEE Congress on Evolutionary Computation

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This paper proposes to implement multifunctional image filters using multifunctional gates such as polymorphic gates or multiplexed ordinary gates. The design procedure is based on evolutionary design and optimization conducted using Cartesian genetic programming (CGP). Because of the complexity of the problem the design is decomposed to two phases. In the first step, a multifunctional filter is evolved at the registertransfer level (RTL) using a set of processing elements containing functions such as minimum/maximum, minimum/average etc. over two pixels. In the second step, gate-level implementations of the processing elements utilized in evolved filters are designed and optimized using CGP in combination with conventional logic synthesis tools. It is shown that resulting filters exhibit good filtering capabilities. They are also area-efficient in comparison with solutions based on multiplexing of ordinary filters.

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Gate-level optimization of polymorphic circuits using Cartesian Genetic Programming

Cited by 14 publications

References 19 publications

Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles

Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles

Gracefully Degrading Circuit Controllers Based on Polytronics

Two-step evolution of polymorphic circuits for image multi-filtering

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