Reducing the number of transistors in digital circuits using gate-level evolutionary design

Gajda, Zbysek; Sekanina, Lukáš

doi:10.1145/1276958.1277010

Cited by 15 publications

(4 citation statements)

References 16 publications

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“…Beside the direct comparison of the results delivered by the proposed synthesis method and those obtained with the help of the conventional Espresso tool (in terms of the overall circuit size comprising 2-input logic elements and some special polymorphic functional blockssee corresponding sections in Table 2), several additional tests were performed in order to find whether the proposed method exhibits any dependence on the following attributes • Figure 2, total number of logic inputs (test circuits defined in Table 1 are shown from left to right in the order as follows -1, 2, 3, 5,6,7,13,14,15,8,9,10,11,12,4), to show the effect on the resulting synthesis method efficiency (compared with Espresso tool as 100 % reference).…”

Section: Resultsmentioning

confidence: 99%

“…• Figure 4, percentage of the inputs with logic 1 value (test circuits defined in Table 1 are shown from left to right in the order as follows -11, 12, 15, 2, 4, 7, 1, 3, 5,6,8,9,10,13,14). Reference in the case of the different percentage of inputs with a logic 1 value is shown here for circuits defined in Table 2.…”

Section: Resultsmentioning

confidence: 99%

“…Conventional optimization methods for ordinary digital circuits are quite unusable. Hence the evolutionary optimization methods could bring the solution [12,13].…”

Section: Synthesis Methods For Polymorphic Circuitsmentioning

confidence: 99%

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Novel Approach To Synthesis of Logic Circuits Based on Multifunctional Components

Crha

Růžička

Simek

2016

Journal of Electrical Engineering

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Multifunctional logic continuously becomes an important way how to implement compact and cheap circuits with intrinsic reconfiguration features. Polymorphic electronics concept with its substantial technological independency opens a way to fulfil this objective through the adoption of emerging semiconductor technologies and advanced synthesis methods. The paper comes with a proposal of a novel synthesis method oriented on the exploitation of polymorphic electronics principles. Key part of it is based on Boolean divisor identification and function kernelling technique. The proposed method is evaluated with several test circuits.

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Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

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Novel Approach To Synthesis of Logic Circuits Based on Multifunctional Components

Crha

Růžička

Simek

2016

Journal of Electrical Engineering

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“…Cartesian Genetic Programming (CGP) has been applied to evolve novel implementations of digital circuits in the recent years [1,2,3]. In order to reduce the number of gates, a correctly working circuit is evolved firstly.…”

Section: Introductionmentioning

confidence: 99%

When does Cartesian genetic programming minimize the phenotype size implicitly?

Gajda

Sekanina

2010

Proceedings of the 12th Annual Conference on Genetic and Evolutionary Computation

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A new method is proposed to minimize the number of gates in combinational circuits using Cartesian Genetic Programming (CGP). We show that when the selection of the parent individual is performed on basis of its functionality solely (neglecting thus the phenotype size) smaller circuits can be evolved even if the number of gates is not considered by a fitness function. This phenomenon is confirmed on the evolutionary design of combinational multipliers.

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Enhancing Cartesian genetic programming through preferential selection of larger solutions

Milano

Nolfi

2020

Evol. Intel.

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We demonstrate how efficiency of Cartesian Genetic Programming method can be scaled up through the preferential selection of phenotypically larger solutions, i.e. through the preferential selection of larger solutions among equally good solutions. The advantage of the preferential selection of larger solutions is validated on the six, seven and eight-bit parity problems, on a dynamically varying problem involving the classification of binary patterns, and on the "Paige" regression problem. In all cases, the preferential selection of larger solutions provides an advantage in term of the performance of the evolved solutions and in term of speed, the number of evaluations required to evolve optimal or high-quality solutions. The advantage provided by the preferential selection of larger solutions can be further extended by self-adapting the mutation rate through the one-fifth success rule. Finally, for problems like the Paige regression in which neutrality plays a minor role, the advantage of the preferential selection of larger solutions can be extended by preferring larger solutions also among quasi-neutral alternative candidate solutions, i.e. solutions achieving slightly different performance.

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Reducing the number of transistors in digital circuits using gate-level evolutionary design

Cited by 15 publications

References 16 publications

Novel Approach To Synthesis of Logic Circuits Based on Multifunctional Components

Novel Approach To Synthesis of Logic Circuits Based on Multifunctional Components

When does Cartesian genetic programming minimize the phenotype size implicitly?

Enhancing Cartesian genetic programming through preferential selection of larger solutions

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