Enhancement of hot-carrier induced degradation under low gate voltage stress due to hydrogen for NMOSFETs with SiN films

Tokitoh, S.; Uchida, Hidetsugu; Shibusawa, K.; Murakami, Noriaki; Nakamura, Tomonori; Aoki, Hitoshi; Yamamoto, S.; Hirashita, N.

doi:10.1109/relphy.1997.584279

Cited by 5 publications

(1 citation statement)

References 6 publications

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“…The model is described as follows. It is known that H' ions can be released during PECVD nitride deposition[6]. In this study, a PECVD oxynitride film (SION) is used as the etching-stop layer for all the IMD layers.…”

mentioning

confidence: 99%

Instability trade-off of inter-layer or inter-metal dielectrics formation with low-k dielectrics on active and field device's characteristics

Chen

Shih²,

Yu³

et al.

2001 6th International Symposium on Plasma- And Process-Induced Damage (IEEE Cat. No.01TH8538)

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The effects of back end of line (BEOL) processing with low dielectric constant (low-k) materials on active and field devices' performances have been studied. The study reveals: 1) There is SPICE model uncertainty because Idsat increases as more metal layers are added; 2) Low-k dielectrics can enhance this Idsat increase; and 3) NMOSFETs hot carrier lifetime and PMOSFETs Vt stability are degraded. These effects are attributed to the BEOL-induced hydrogen generation and passivation with gate oxide dangling bonds, which are primarily created in the contact etching process. The modified process involves pure hydrogen alloy after metal-1 formation, which ensures the same device performance at metal-1 and at the final metal layer. In addition, the alloy can reduce the inverse narrow width effect and field isolation leakage currents.

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mentioning

confidence: 99%

Instability trade-off of inter-layer or inter-metal dielectrics formation with low-k dielectrics on active and field device's characteristics

Chen

Shih²,

Yu³

et al.

2001 6th International Symposium on Plasma- And Process-Induced Damage (IEEE Cat. No.01TH8538)

View full text Add to dashboard Cite

show abstract

Increase of parasitic resistance in shallow p/sup +/ extension by SiN sidewall process and its improvement by Ge preamorphization for sub-0.25-μm pMOSFET's

Inaba

Murakoshi

Tanaka

et al. 1999

IEEE Trans. Electron Devices

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Enhancement of hot-carrier induced degradation under low gate voltage stress due to hydrogen for NMOSFETs with SiN films

Cited by 5 publications

References 6 publications

Instability trade-off of inter-layer or inter-metal dielectrics formation with low-k dielectrics on active and field device's characteristics

Instability trade-off of inter-layer or inter-metal dielectrics formation with low-k dielectrics on active and field device's characteristics

Increase of parasitic resistance in shallow p/sup +/ extension by SiN sidewall process and its improvement by Ge preamorphization for sub-0.25-μm pMOSFET's

Anomalous NMOSFET hot carrier degradation due to hole injection in a DGO CMOS process

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