Anomalous NMOSFET hot carrier degradation due to hole injection in a DGO CMOS process

Brisbin, D.; Mirgorodski, Y.V.; Chaparala, P.

doi:10.1109/irws.2004.1422749

Cited by 3 publications

(2 citation statements)

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“…1: Cross section of an example for the integration of CMOS, HVNMOS and LNDMOS. HC degradation in LDMOSFETs has been studied by many authors [2,[15][16][17][18][19]. However, we discuss three important practical issues in hot carrier (HC) reliability of LDMOSFETs or HVMOSFETs in BCD technology in this paper.…”

Section: Cmos Hvnmos Lndmosmentioning

confidence: 99%

“…The second issue is how to reduce HC degradation in LDMOS/HVMOS due to BEOL process. It has been reported for CMOS devices that HC performance can be degraded by BEOL processes such as interlayer dielectric film deposition, etch, metal deposition and etch process [3][4][5]. The BEOL processes in BCD technology may have a different impact on LDMOS/HVMOS HC performance than on CMOS's since the LDMOS/HVMOS has a long drift region and its interlayer dielectric and metallization as well as contact etch may be different from CMOS's.…”

Section: Cmos Hvnmos Lndmosmentioning

confidence: 99%

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(Invited) Hot Carrier Reliability of High Voltage HVMOSFETs in BCD (Bipolar-CMOS-DMOS) Technology

Hao

2017

ECS Trans.

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This paper discusses three important practical issues in hot carrier (HC) reliability of Laterally Diffused MOSFETs (LDMOSFETs) or high voltage MOSFET (HVMOSFETs) in Bipolar-CMOS-DMOS (BCD) technology. One of the main reliability issues encountered during development of the LDMOSFET or HVMOSFET is optimizing the trade-offs between specific on-resistance (Rdson) and hot carrier (HC) degradation. We developed a new LDMOS/HVMOS structure in which the HC degradation has been significantly reduced without sacrificing the Rdson. The second issue is how to reduce HC degradation in LDMOS due to plasma reduced charge in Back-End-Of-Line (BEOL). We demonstrate a modified SiN barrier layer which can improve device hot carrier performance. A third issue is that self heating, caused by HC stress in packaged LDMOS and HVMOS devices, significantly affects the HC degradation characteristics. A method is proposed to eliminate the influence of the self heating effect on HC measurement.

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