Enhanced hot-hole degradation in P/sup +/-poly PMOSFETs with oxynitride gate dielectrics

Chen, Y.Y.; Gardner, Mark; Fulford, J.; Wristers, D.; Joshi, Atul; Chung, L.; Kwong, D. L.

doi:10.1109/vtsa.1999.786006

Cited by 7 publications

(5 citation statements)

References 5 publications

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“…The band gap of the oxynitride film is smaller than that of silicon oxide. 11) It is known that the trapped electron in SRON requires energy smaller than 1.5 eV to escape from trapping. 15) Thus, the energy level of the charge trap sites in the oxynitride film is located about 1.5 eV below the conduction band edge of the oxynitride film.…”

Section: Resultsmentioning

confidence: 99%

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Study On Charge Trap Layers In Charge Trap Metal–Oxide–Semiconductor Field Effect Transistor

Cho

Joo

Yeo

et al. 2009

jjap

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We construct a kink solution on a non-BPS D-brane using Berkovits' formulation of superstring field theory in the level truncation scheme. The tension of the kink reproduces 95% of the expected BPS D-brane tension. We also find a lump-like solution which is interpreted as a kink-antikink pair, and investigate some of its properties. These results may be considered as successful tests of Berkovits' superstring field theory combined with the modified level truncation scheme.

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Section: Resultsmentioning

confidence: 99%

“…Additionally, the band gap between the conduction band and the valence band of a SiO 2 dielectric can be decreased by nitrogen incorporation. [11][12][13]…”

Section: Introductionmentioning

confidence: 99%

Study On Charge Trap Layers In Charge Trap Metal–Oxide–Semiconductor Field Effect Transistor

Cho

Joo

Yeo

et al. 2009

jjap

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“…Hot Carrier Stress describes a degradation of the electrical parameters of MOSFETs under a dynamic stress mode (Hu et al, 1985;LaRosa et al, 1997;Chen et al, 1999;Lu et al, 2004;Bravaix et al, 2009). The lateral electrical field between source and drain of a current driving transistor can lead to high energetic carriers.…”

Section: Hot Carrier Stressmentioning

confidence: 99%

Device reliability challenges for modern semiconductor circuit design – a review

Schlunder

2009

Adv. Radio Sci.

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Abstract. Product development based on highly integrated semiconductor circuits faces various challenges. To ensure the function of circuits the electrical parameters of every device must be in a specific window. This window is restricted by competing mechanisms like process variations and device degradation (Fig. 1). Degradation mechanisms like Negative Bias Temperature Instability (NBTI) or Hot Carrier Injection (HCI) lead to parameter drifts during operation adding on top of the process variations. The safety margin between real lifetime of MOSFETs and product lifetime requirements decreases at advanced technologies. The assignment of tasks to ensure the product lifetime has to be changed for the future. Up to now technology development has the main responsibility to adjust the technology processes to achieve the required lifetime. In future, reliability can no longer be the task of technology development only. Device degradation becomes a collective challenge for semiconductor technologist, reliability experts and circuit designers. Reliability issues have to be considered in design as well to achieve reliable and competitive products. For this work, designers require support by smart software tools with built-in reliability know how. Design for reliability will be one of the key requirements for modern product designs. An overview will be given of the physical device damage mechanisms, the operation conditions within circuits leading to stress and the impact of the corresponding device parameter degradation on the function of the circuit. Based on this understanding various approaches for Design for Reliability (DfR) will be described. The function of aging simulators will be explained and the flow of circuit-simulation will be described. Furthermore, the difference between full custom and semi custom design and therefore, the different required approaches will be discussed.

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“…[14][15][16][17] This is due to the nitrogen incorporation at gate oxide/silicon interface, which can avoid hot-carrier damages, prevent boron penetration and improve interface endurance to Fowler-Nordheim ͑FN͒ stress. [18][19][20][21][22][23] But normal nitridation with NO or N 2 O ambient introduces a small amount of nitrogen at Si/SiO 2 interface, which is insufficient to prevent boron penetration when the oxide is thinner than 3.0 nm. Increasing the temperature or time to increase the nitrogen concentration in oxides will result in a thicker oxide and redistribution of channel doping profile.…”

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confidence: 99%

Nitrogen Effects on the Integrity of Silicon Dioxide Grown on Polycrystalline Silicon

Lai

Kao

Lee

et al. 2007

J. Electrochem. Soc.

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In this paper, we describe a simple technique to achieve a thin nitrided polyoxide film, only requiring an extra nitrogen implantation to be compatible with the floating gate nonvolatile memory process. The integrity of polyoxides is improved by using the through-silicon-gate nitrogen implantation. Nitridation can be achieved by implanting nitrogen into polysilicon gate followed by a high temperature annealing to drive the nitrogen atoms across the polysilicon, through the polyoxide, and to incorporate nitrogen at the polyoxide/polysilicon interface. The nitrogen-rich layer formed during the driven-in process not only strengthens the polyoxide structure but also improves the polyoxide quality. Improvements of electrical characteristics such as a low leakage current, a low electron trapping, and a high breakdown field for both positive and negative biases have been observed.

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Enhanced hot-hole degradation in P/sup +/-poly PMOSFETs with oxynitride gate dielectrics

Cited by 7 publications

References 5 publications

Study On Charge Trap Layers In Charge Trap Metal–Oxide–Semiconductor Field Effect Transistor

Study On Charge Trap Layers In Charge Trap Metal–Oxide–Semiconductor Field Effect Transistor

Device reliability challenges for modern semiconductor circuit design – a review

Nitrogen Effects on the Integrity of Silicon Dioxide Grown on Polycrystalline Silicon

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