This work demonstrates the improved characteristics of an ultrathin CeO 2 dielectric by using the post-N 2 O plasma treatment with additional rapid thermal N 2 annealing. The CeO 2 after the treatment exhibits superior characteristics such as a small effective oxide thickness ͑ϳ2.25 nm͒, a low leakage current (5.4 ϫ 10 Ϫ4 A/cm 2), a high breakdown electric field ͑Ϫ24 MV/cm͒, a long projected 10 yr lifetime ͑Ϫ12 MV/cm͒, a small capacitance-voltage hysteresis ͑25 mV͒, and a high barrier height for Frenkel-Poole emission ͑0.55 eV͒. These good properties are attributed to the nitrogen incorporation into the dielectric to eliminate the traps after annealing. The postnitridation annealing appears to be a very useful treatment for future ultrathin metal-oxide gate dielectrics.

We investigated the carrier transportation of ultrathin CeO 2 gate dielectrics with rapid thermal annealing ͑RTA͒. After annealing, the effective oxide thickness was decreased and the characteristics were significantly improved. Temperature dependence of gate leakage current was studied and Frenkel-Poole dominated the conduction mechanism for low RTA temperature. As the annealing temperature increases, Fowler-Nordheim tunneling became much more important and the CeO 2 /n-Si electron barrier height of 0.75 eV was extracted for future modeling and simulation. In addition, the energy band diagram of Al/CeO 2 /n-Si structure was established for the first time.

For the first time, the characteristics and temperature dependence of electrical properties for ultrathin HfO 2 gate dielectrics treated in NH 3 plasma after deposition were investigated. After this treatment, significant nitrogen incorporation at the HfO 2 /silicon interface ͑interfacial layer͒ was examined by Auger electron spectroscopy. Moreover, the formation of HfuN bonding and the suppression of HfuSi bonding were observed from electron spectroscopy for chemical analysis spectra. The activation energy of charge trapping reflected in the current-voltage characteristics was effectively reduced, which led to improved hysteresis and its weaker temperature dependence in HfO 2 gate dielectrics treated in NH 3 plasma.Superior characteristics of high dielectric constant ͑high-k͒ materials like hafnium dioxide (HfO 2 ) and zirconium dioxide (ZrO 2 ) are important because the driving capability of the internal circuit and power consumption of high-speed circuits are crucial to the production of high-performance metal-oxide-semiconductor ͑MOS͒ integrated circuits. Recent attention 1-3 has been paid to the feasibility of using hafnium dioxide to replace SiO 2 as the gate dielectric of field-effect transistors due to its high dielectric constant ͑ϳ30͒, wide energy bandgap ͑ϳ5.68 eV͒, and high stability with the Si surface. Unfortunately, for high-k gate dielectrics, there is a hysteresis phenomenon in its capacitance-voltage ͑C-V͒ characteristics. 4,5 This hysteresis will induce a flatband voltage shift, consequently a threshold voltage instability when it is applied to metal-oxidesemiconductor field-effect transistors ͑MOSFETs͒. Therefore, some methods, such as cosputtering of silicon and aluminum with hafnium to deposit hafnium silicate and aluminate dielectrics, 6,7 and the use of nitric gas for chemical vapor deposition ͑CVD͒ 8 or oxidizing sputtered metal nitride like HfN 9 to form hafnium oxynitride ͑HfON͒ films, are used to improve it. In this work, we propose a postdeposition NH 3 plasma treatment methodology to study its effects on HfO 2 gate dielectrics. Leakage current and hysteresis measurements were done at elevated temperatures to provide benefits of our treatment. Our result shows that this novel approach can successfully introduce nitrogen atoms into the dielectrics to form HfuN bonding and suppress HfuSi bonding, leading to the reduction of some trapping levels, and hence the hysteresis is reduced significantly. ExperimentalAl/TaN/HfO 2 /p-Si capacitors with an area of 6.36 ϫ 10 Ϫ5 cm 2 were fabricated on 4 in. p-type Si wafers. First, the 5 nm thick HfO 2 film was deposited by electron-beam evaporation. After the gate dielectric was formed, some samples were treated by NH 3 plasma at 20 W for 5 min ͑PNH3͒. Some samples were then rapid thermal annealed for 1 min in an N 2 ambient at 400-600°C ͑RTA400, RTA600͒. A TaN film of 25 nm was then deposited by a sputter. Thereafter, a 500 nm thick Al film was deposited on the TaN film by a thermal coater. The gate of the capacitor was then defined lithographical...

The fluorine implantation on polysilicon was found to improve the characteristics of polysilicon thin-film transistors (TFT's). The fluorine passivates the trap states within the polysilicon channel. As compared with the HZ-plasma passivation, the fluorine implantation passivates more uniformly both the band tail-states and midgap deep-state, while the HZ-plasma treatment is more effective to passivate deep states than tail states. A fluorine-implanted device can be further improved its performance if an Hz-plasma treatment is applied. In contrast to the H2-plasma passivation, the fluorine passivation improves the device hot-carrier immunity. Combining the fluorine passivation and H2-plasma passivation, a high performance TFT with a high hot-carrier immunity can be obtained. MOS has a better irradiation and hot-carrier resistance [ 121. Recently, H. Kitajima et al. had found that F+ implantation is

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