Electron transport properties of Si/SiGe heterostructures: Measurements and device implications

Abstract

We report electron transport properties of modulation-doped Si/SiGe at 300 and 77 K. Record mobilities of 2830 and 18 000 cm2/V s at 300 and 77 K, respectively, have been measured. Depending on the spacer layer thickness, the sheet resistance of the Si channel is in the range of 2000–10 000 Ω/⧠ at 300 K and 450–700 Ω/⧠ at 77 K. The low field electron drift velocity is 2–3 (5–10) times higher than the corresponding velocity measured in Si/SiO2 structures at 300 K (77 K). The saturation velocity is measured to be only 5% higher than in bulk Si, at both 300 and 77 K, but appears at a lower electric field. The effect of the enhanced transport properties in modulation-doped Si/SiGe on device design and performance is investigated.

Electron transport in Si/SiGe modulation-doped heterostructures using Monte Carlo simulation

“…This calculated mobility matches very well the value measured by differential Hall technique (2700 cm 2 /Vs, open square in Fig. 3) and the best other values reported at low electron density [7]. This agreement validates our approach of phonon scattering modeling.…”

“…The starting point of these device concepts is the growth of high-quality Si/SiGe heterostructures taking advantage of the strain-induced mobility enhancement [7][8]. The understanding of their transport properties and of the underlying physics is then a key issue.…”

High-performance nMOSFETs using a novel strained Si/SiGe CMOS architecture

“…Thus, the reduced enhancements in observed at higher bias voltages and smaller L (Fig. 15) are due to SiGe self-heating effects dominating the gain available in strained Si devices producing high current levels rather than a result of earlier velocity saturation in strained Si compared with unstrained Si [35].…”

Electron effective mobility in strained-Si/Si1−xGex MOS devices using Monte Carlo simulation

“…The biaxial tensile strain introduces splitting of degenerate bands [1] which results, for both electrons and holes, in smaller in-plane conduction mass and reduced intervalley scattering thereby yielding improved carrier velocity. In the case of electrons this effect has been clearly shown from mobility measurement and calculation in SiGe-Si-SiGe quantum wells [2][3][4] and it has been used for designing high-performance MODFET with low noise figure and high cut-off and maximum oscillation frequencies [5][6]. Now efforts are made to transfer this advantage in CMOS technology on either bulk or insulating substrate [7][8][9][10].…”