Electrical Transport Properties of Single-Layer WS₂

Abstract

We report on the fabrication of field-effect transistors based on single layers and bilayers of the semiconductor WS2 and the investigation of their electronic transport properties. We find that the doping level strongly depends on the device environment and that long in situ annealing drastically improves the contact transparency, allowing four-terminal measurements to be performed and the pristine properties of the material to be recovered. Our devices show n-type behavior with a high room-temperature on/off current ratio of ∼10(6). They show clear metallic behavior at high charge carrier densities and mobilities as high as ∼140 cm(2)/(V s) at low temperatures (above 300 cm(2)/(V s) in the case of bilayers). In the insulating regime, the devices exhibit variable-range hopping, with a localization length of about 2 nm that starts to increase as the Fermi level enters the conduction band. The promising electronic properties of WS2, comparable to those of single-layer MoS2 and WSe2, together with its strong spin-orbit coupling, make it interesting for future applications in electronic, optical, and valleytronic devices.

Percolative switching in transition metal dichalcogenide field-effect transistors at room temperature

“…Recently, we have shown [47] that thermal annealing can also reduce the noise magnitude in MoS 2 FETs by over two orders of magnitude, through improved transparency of the electrical contacts [37,52]. We found a strong effect of annealing on the electrical transport in our WSe 2 -FETs.…”

“…While noise in all devices was found to primarily originate from carrier number fluctuations at the channel-substrate interface, the key result is the observation of an unambiguous scaling of N σ with σ, suggesting classical percolation in spatially inhomogeneous medium at the onset of conduction. Similar behavior for both WSe 2 and MoS 2 FETs imply We chose WSe 2 FETs as the primary experimental platform due to the following reasons: First, WSe 2 is an emerging TMDC FET material with several desirable properties ranging from high carrier mobility due to low effective mass of the carriers, ambipolar conduction and superior chemical stability compared to sulphides [12,13,28,32,33,35,37]. Second, in spite of the progress in standard electrical transport properties [19,[28][29][30][31][32][33][34][35], the origin and magnitude of intrinsic 1 f -noise, a crucial performance limiting factor in electronic device applications, in WSe 2 FETs is not known, and third, given the recent studies of noise in MoS 2 FETs [46][47][48][49][50], similar studies in WSe 2 allows identification of the generic aspects of noise processes in TMDC FETs, which in turn, provides crucial insight to microscopic details of charge distribution and disorder.…”

Anisotropic charged impurity-limited carrier mobility in monolayer phosphorene

“…For example, the phonon-limited electron mobility in single-layer MoS 2 is estimated [19,25] to be around 200 to 410 cm 2 V −1 s −1 at room temperature while the measured electron mobility is at least one order of magnitude smaller at around 20 cm 2 V −1 s −1 even in the metallic phase. [10,17] Furthermore, the measured mobility in single-layer TMD crystals also exhibit [22,23] a strong carrier density dependence as predicted by charged impuritylimited transport models. [13] Although the electrical transport properties of monolayer phosphorene have not been characterized, independent measurements of the hole mobility [8,12] have shown that the room-temperature hole mobility in multi-layer BP decreases sharply as the crystal thickness is progressively reduced.…”

“…[13] The calculated intrinsic phonon-limited carrier mobility in monolayer graphene [18] and TMD crystals [19,20] is usually much higher than what is measured in experiments, [4,10,17,[21][22][23][24] suggesting that defect and charged impurity scattering are the key mobility-limiting mechanism even at room temperature. For example, the phonon-limited electron mobility in single-layer MoS 2 is estimated [19,25] to be around 200 to 410 cm 2 V −1 s −1 at room temperature while the measured electron mobility is at least one order of magnitude smaller at around 20 cm 2 V −1 s −1 even in the metallic phase.…”

Characteristics of layered tin disulfide deposited by atomic layer deposition with H2S annealing

“…These TMD materials have a hexagonal structure similar to graphene and a suitable band gap for fabricating thin film transistors (TFT). 8,9 One of the most researched TMDs is molybdenum disulfide (MoS 2 ). According to previous reports, field effect transistors using MoS 2 as a channel material had an adequate on/off ratio and electrical carrier mobility.…”