Effects of downscaling channel dimensions on electrical characteristics of InAs-FinFET transistor

Mahmood, Ahmed; Jabbar, Waheb A.; Hashim, Yasir; Manap, Hadi

doi:10.11591/ijece.v9i4.pp2902-2909

Cited by 12 publications

(10 citation statements)

References 15 publications

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“…According to Figure 4, the DIBL and GIDL component due to the Subthreshold current is low sensitivity, which is unsuitable for SCE in the nanoscale devices. The proposed model in [20] uses an approximation that decreases the effect of higher weak inversion current but with adding a new factor to the delay processing for the transistor. The exponential dependence of the body factor in [20,21] also adds new values of delay for the proposed model.…”

Section: Subthreshold Leakage Current Comparisons and Simulation Resultsmentioning

confidence: 99%

“…The proposed model in [20] uses an approximation that decreases the effect of higher weak inversion current but with adding a new factor to the delay processing for the transistor. The exponential dependence of the body factor in [20,21] also adds new values of delay for the proposed model. The comparison between the proposed model and other models shown in the same figure is given using the same SPICE parameters In addition, applying the proposed model using different SPICE parameters is shown in Figure 5.…”

Section: Subthreshold Leakage Current Comparisons and Simulation Resultsmentioning

confidence: 99%

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Accurate leakage current models for MOSFET nanoscale devices

Rjoub¹,

Mistarihi²,

Taradeh³

2020

IJECE

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This paper underlines a closed forms of MOSFET transistor’sleakage current mechanisms inthe sub 100nmparadigm.The incorporation of draininduced barrier lowering (DIBL), Gate Induced Drain Lowering (GIDL) and body effect (m) on the sub-threshold leakage (Isub) wasinvestigated in detail. The Band-To-Band Tunneling (IBTBT) due to the source and Drain PN reverse junction were also modeled witha close and accurate model using a rectangularapproximation method (RJA). The three types of gate leakage (IG) were also modeled and analyzed for parasitic (IGO), inversion channel (IGC), and gate substrate (IGB).In addition, the leakage resources due to the aggressive reduction in the oxide thickness (<5nm) have been investigated. Simulation results using HSPICEexhibits a tremendous agreement with the BSIM4 model. The dominant value of the sub-threshold leakage was due to the DIBL and GIDL effects. Various recommendations regarding minimizing the leakage current at both device level and the circuit level were suggested at the end of this paper

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Section: Subthreshold Leakage Current Comparisons and Simulation Resultsmentioning

confidence: 99%

Section: Subthreshold Leakage Current Comparisons and Simulation Resultsmentioning

confidence: 99%

Accurate leakage current models for MOSFET nanoscale devices

Rjoub¹,

Mistarihi²,

Taradeh³

2020

IJECE

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“…The sub-threshold slop (SS) is the voltage applied on the gate to change the drain current by decade [13]. To obtaining a low sub-threshold slop (SS < 60mV /dec) and high switching performance (I ON /I OFF > 10 5 ) [14], the quantum mechanism in tunneling TFETs has been introduced as a substitution carrier injection mechanism in MOSFETs which suffers from thermal limitation [15][16][17]. Other advantages of the TFETs are to reduce leakage current, and to provide higher current than the MOSFET, better electrostatic control, prevention of the short channel effects and suitable to fabricate with CMOS processing techniques [18][19][20][21][22].…”

Section: Introductionmentioning

confidence: 99%

Electrical characterization of si nanowire GAA-TFET based on dimensions downscaling

Abdul-kadir

Hashim²,

Shakib

et al. 2021

IJECE

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This research paper explains the effect of the dimensions of Gate-all-around Si nanowire tunneling field effect transistor (GAA Si-NW TFET) on ON/OFF current ratio, drain induces barrier lowering (DIBL), sub-threshold swing (SS), and threshold voltage (VT). These parameters are critical factors of the characteristics of tunnel field effect transistors. The Silvaco TCAD has been used to study the electrical characteristics of Si-NW TFET. Output (gate voltage-drain current) characteristics with channel dimensions were simulated. Results show that 50nm long nanowires with 9nm-18nm diameter and 3nm oxide thickness tend to have the best nanowire tunnel field effect transistor (Si-NW TFET) characteristics.

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“…Thus, the performance of the system would be acceptable even with a certain level of noise from the critical channel. In another meaning, the performance of the system can not be tolerable when the noise level is higher than this critical level [10][11][12]. Fading occurs because of overlapping between two or more from the signals sent to the receiver at slightly different times.…”

Section: Introductionmentioning

confidence: 99%

Performance analysis of image transmission with various channel conditions/modulation techniques

et al. 2020

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This paper investigates the impact of different modulation techniques for digital communication systems that employ quadrature phase shift keying (QPSK) and quadrature amplitude modulation (16-QAM and 64-QAM) to transmit images over AWGN and Rayleigh fading channels for the cellular mobile networks. In the further steps, wiener and median filters has been adopted to the simulation are used at the receiver side to remove the impulsive noise present in the received image. This work is performed to evaluate the transmission of two dimensional (2D) gray-scale and color-scale (RGB) images with different values from signal to noise ratios (SNR), such as; (5, 10 and 15) dB over different channels. The correct conclusions are made by comparing many of the observed Matlab simulation results. This was carried out through the results that measure the quality of received image, which is analyzes in terms of SNRimage peak signal to noise ratio (PSNR) and mean square error (MSE).

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Effects of downscaling channel dimensions on electrical characteristics of InAs-FinFET transistor

Cited by 12 publications

References 15 publications

Accurate leakage current models for MOSFET nanoscale devices

Accurate leakage current models for MOSFET nanoscale devices

Electrical characterization of si nanowire GAA-TFET based on dimensions downscaling

Performance analysis of image transmission with various channel conditions/modulation techniques

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