Determination of transient transistor capacitances of high voltage MOSFETs from dynamic measurements

Hoch, Vera; Petzoldt, J.; Jacobs, H.; Schlögl, A.; Deboy, G.

doi:10.1109/ispsd.2009.5158023

Cited by 14 publications

(4 citation statements)

References 3 publications

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“…This effect, experimentally proven in [10], only takes place during some specific periods of time within fast turn-on and turn-off events. An alternative method used in this manuscript to study the current diversion is the Mixed-Mode simulation.…”

Section: Current Diversionmentioning

confidence: 92%

“…Aside from the non-linear capacitances, extensively described in Section II, the new model also includes a correction to the displacement currents inside the MOSFET. Despite a few papers mentioning the impact of the displacement current on the power dissipation [8]- [10], this effect has never been included before in an analytical model. The details for the current displacement modeling will be found in Section III.…”

Section: Introductionmentioning

confidence: 99%

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Analytical Switching Loss Model for Superjunction MOSFET With Capacitive Nonlinearities and Displacement Currents for DC–DC Power Converters

Castro

Roig

Gelagaev

et al. 2016

IEEE Trans. Power Electron.

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Abstract-A new analytical model is presented in this work to predict power losses and waveforms of high-voltage silicon SuperJunction (SJ) MOSFET during hardswitching operation. This model depends on datasheet parameters of the semiconductors, as well as, the parasitics obtained from the printed circuit board characterization. It is important to note that it also includes original features accounting for strong capacitive non-linearities and displacement currents. Moreover, these features demand unusual extraction of electrical characteristics from regular datasheets. A detailed analysis on how to obtain this electrical characteristics is included in this work.Finally, the high accuracy of the model is validated with experimental measurements in a double-pulse buck converter setup by using commercial SJ MOSFET, as well as, advanced device prototypes under development.

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Section: Current Diversionmentioning

confidence: 92%

Section: Introductionmentioning

confidence: 99%

Analytical Switching Loss Model for Superjunction MOSFET With Capacitive Nonlinearities and Displacement Currents for DC–DC Power Converters

Castro

Roig

Gelagaev

et al. 2016

IEEE Trans. Power Electron.

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“…Recently published papers, have shown the impact of displacement currents due to COSS during turn-On and turn-Off intervals, and how they directly affect the calculation of switching losses [4]- [7]. The equivalent circuit of the power MOSFET, as shown in Fig.…”

Section: Limitations Of the Existing Power Analysis Techniquesmentioning

confidence: 99%

Measurement of Power Dissipation Due to Parasitic Capacitances of Power MOSFETs

et al. 2020

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Analysis of the switching losses in a power MOSFET is crucial for the design of efficient power electronic systems. Currently, the state-of-the-art technique is based on measured drain current and drain-to-source voltage during the switching intervals. However, this technique does not separate the switching power due to the resistance of the MOSFET channel and due to the parasitic capacitances. In this paper, we propose a measurement method to extract the power dissipation due to the parasitic capacitances of a MOSFET, providing useful information for device selection and for the design of efficient power electronic systems. The proposed method is demonstrated on a basic boost converter. The proposed method shows that the existing method underestimates the turn-On losses by 41% and overestimates the turn-Off losses by 35%. INDEX TERMS Channel current, current diversion phenomenon, COSS losses, efficiency, power losses, power MOSFET, switching losses.

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“…The influence of the switching K. Li, A. Videt, and N. Idir are with the University of Lille, L2EP, 59655 Villeneuve dAscq, France (e-mail: ke1.li@ed.univ-lille1.fr; arnaud.videt@univ-lille1.fr; nadir.idir@univ-lille1.fr). current on inter-electrode capacitances evolution is presented by authors in [13], [14] in the case of a Si-MOSFET. In this paper, a "Normally-off" SiC-JFET (SJEP120R063) is studied, of which some basic technical data are listed in TABLE I.…”

Section: Introductionmentioning

confidence: 99%

Characterization Method of SiC-JFET Interelectrode Capacitances in Linear Region

Videt

Idir

2016

IEEE Trans. Power Electron.

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In order to study switching waveforms of a SiC-JFET, its inter-electrode capacitances evolution is necessary when the power device is in linear region. In this paper, the reverse transfer capacitance C gd is at first characterized by the multiplecurrent-probe method and afterwards validated by the measurement with an impedance analyzer. The output capacitance Coss is measured by the same method and compared with the single-pulse characterization, which shows a huge increase of the apparent capacitance values in linear region. The influence of the power transistor internal gate resistor is thus studied, revealing the inter-electrode capacitances measurement difficulties when the power device is in linear region. The characterization results are allowed to finely model the power transistor of which the switching behaviors are validated with the measurement in a buck converter.

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Determination of transient transistor capacitances of high voltage MOSFETs from dynamic measurements

Cited by 14 publications

References 3 publications

Analytical Switching Loss Model for Superjunction MOSFET With Capacitive Nonlinearities and Displacement Currents for DC–DC Power Converters

Analytical Switching Loss Model for Superjunction MOSFET With Capacitive Nonlinearities and Displacement Currents for DC–DC Power Converters

Measurement of Power Dissipation Due to Parasitic Capacitances of Power MOSFETs

Characterization Method of SiC-JFET Interelectrode Capacitances in Linear Region

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