2020
DOI: 10.1109/jeds.2020.3015265
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Characterization and Modeling of 0.18μm Bulk CMOS Technology at Sub-Kelvin Temperature

Abstract: Previous cryogenic electronics studies are mostly at 77K and 4.2K. Cryogenic characterization of a 0.18µm standard bulk CMOS technology (operating voltages: 1.8V and 5V) is presented in this paper. Several NMOS and PMOS devices with different width to length ratios (W/L) were extensively tested and characterized under various bias conditions at sub-kelvin temperature. In addition to devices dc characteristics, the kink effect and current overshoot phenomenon are observed and discussed at sub-kelvin temperature… Show more

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Cited by 15 publications
(10 citation statements)
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“…The measured data include three characteristics, i.e., the output characteristics and the transfer characteristics in both the linear and the saturation regions. The root-mean-square (RMS) error is introduced to evaluate the fitness of the optimized parameters, which is given by [10]:…”
Section: A Method: Machine Learningmentioning
confidence: 99%
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“…The measured data include three characteristics, i.e., the output characteristics and the transfer characteristics in both the linear and the saturation regions. The root-mean-square (RMS) error is introduced to evaluate the fitness of the optimized parameters, which is given by [10]:…”
Section: A Method: Machine Learningmentioning
confidence: 99%
“…1(d), a step-up effect of a sudden I DS increase is observed. To explore the physical mechanism behind this effect, we performed measurements with different delay times [10] at specific temperatures, with results as shown in Fig. 2.…”
Section: A Cryogenic Measurementmentioning
confidence: 99%
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“…Key advantages of operating at low temperatures include the better electrical performance of MOSFETs, with higher carrier drift velocity and so higher on-state drain current and transconductance, steeper subthreshold slope, lower leakage current [6,19]. Some works have studied bulk MOSFETs operation at cryogenic temperature emphasizing in particular kink behavior and freeze-out effects in those devices [7,15,[20][21][22][23][24]. Recently, outstanding characteristics have been demonstrated at 4.2 K on advanced CMOS technologies [19,[25][26][27], in particular for Fully Depleted Silicon-On-Insulator (FDSOI) [28][29][30][31][32].…”
Section: Introductionmentioning
confidence: 99%