Low Temperature Characterization and Modeling of FDSOI Transistors for Cryo CMOS Applications

Abstract

The wide range of cryogenic applications, such as spatial, high performance computing or high-energy physics, has boosted the investigation of CMOS technology performance down to cryogenic temperatures. In particular, the readout electronics of quantum computers operating at low temperature requires larger bandwidth than spatial applications, so that advanced CMOS node has to be considered. FDSOI technology appears as a valuable solution for co-integration between qubits and consistent engineering of control and read-out. However, there is still lack of reports on literature concerning advanced CMOS nodes behavior at deep cryogenic operation, from devices electrostatics to mismatch and self-heating, all requested for the development of robust design tools. For these reasons, this chapter presents a review of electrical characterization and modeling results recently obtained on ultra-thin film FDSOI MOSFETs down to 4.2 K.

Numerical simulation and analytical modelling of self-heating in FDSOI MOSFETs down to very deep cryogenic temperatures

“…It should be mentioned that the effective mobility 𝜇 𝑒 𝑓 𝑓 deduced from this local mobility law 𝜇 of Eq. (2c) exhibits variation with temperature in agreement with experimental data obtained on FDSOI MOSFETs [20,21].…”

“…Note that the latter effect is disabled in long channel case. The low field empirical mobility law 𝜇 0 (𝑇) describes the mobility increase with temperature reduction governed by phonon scattering and for mobility saturation at low temperature due to prevailing defective scattering [2,20]. It should be mentioned that the effective mobility 𝜇 𝑒 𝑓 𝑓 deduced from this local mobility law 𝜇 of Eq.…”

Conceptual study of a two-layer silicon pixel detector to tag the passage of muons from cosmic sources through quantum processors

“…In the case of CMOS sensors, another related challenge for deep-cryogenic operation is the usability of electronics in these devices at sub-Kelvin temperatures. The detailed properties of the electronics depend on target applications, and circuits designed to operate above 100 K may not perform well below 1 K. Numerous studies in the literature have been focusing on characterizing CMOS electronics designed for operation at around 4 K, and CMOS control and readout devices have been built to operate at these temperatures in quantum computing applications [41][42][43][44][45][46][47][48][49][50][51][52][53][54][55][56][57][58], or recently even as low as ∼ 0.05 K for use with quantum dots [59]. It would be instructive for the future experimental studies of the detector proposed in this paper to test simple CMOS circuits designed for operation at 4 K at the lower temperatures of the cold plate and the still flange.…”

(Invited) Cryogenic Electronics for Quantum Computing ICs: What Can Bring FDSOI

“…8b). Although the theoretical model describing intersubband scattering is known (26), (29), phenomenological equations can be used to have a more analytical model (30). In this simplified approach, front and back channel mobility can be evaluated separately at each interface with:…”