An FPGA Implementation of a Multi-comparand Multi-search Associative Processor

Kokosiński, Zbigniew; Sikora, Wojciech

doi:10.1007/3-540-46117-5_85

Cited by 9 publications

(6 citation statements)

References 13 publications

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“…Since the CAM is the main building block, the denser the CAM cell the better. Hence, different technologies were considered to realize the CAM including pure digital implementations such as Flipflops [25]. Recent advances in emerging Table II: Examples of the AP lookup tables of the order of passes.…”

Section: B Possible Cam Implementationmentioning

confidence: 99%

In-Memory Associative Processors: Tutorial, Potential, and Challenges

Fouda

Yantır

Eltawil

et al. 2022

IEEE Trans. Circuits Syst. II

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In-memory computing is an emerging computing paradigm that overcomes the limitations of exiting Von-Neumann computing architectures such as the memory-wall bottleneck. In such paradigm, the computations are performed directly on the data stored in the memory, which highly reduces the memory-processor communications during computation. Hence, significant speedup and energy savings could be achieved especially with data-intensive applications. Associative processors (APs) were proposed in the seventies and recently were revived thanks to the high-density memories. In this tutorial brief, we overview the functionalities and recent trends of APs in addition to the implementation of each content-addressable memory with different technologies. The AP operations and runtime complexity are also summarized. We also explain and explore the possible applications that can benefit from APs. Finally, the AP limitations, challenges, and future directions are discussed.

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Section: B Possible Cam Implementationmentioning

confidence: 99%

In-Memory Associative Processors: Tutorial, Potential, and Challenges

Fouda

Yantır

Eltawil

et al. 2022

IEEE Trans. Circuits Syst. II

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show abstract

“…Since the CAM is the main building block, the denser the CAM cell the better. Hence, different technologies were considered to realize the CAM including pure digital implementations such as Flipflops [25]. Recent advances in emerging device technologies in resistive switching devices opened the road for high dense memories and associative memories [7].…”

Section: A Possible Cam Implementationmentioning

confidence: 99%

In-memory Associative Processors: Tutorial, Potential, and Challenges

Fouda¹,

Yantır²,

Eltawil³

et al. 2022

Preprint

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In-memory computing is an emerging computing paradigm that overcomes the limitations of exiting Von-Neumann computing architectures such as the memory-wall bottleneck. In such paradigm, the computations are performed directly on the data stored in the memory, which eliminates the need for memory-processor communications. Hence, orders of magnitude speedup could be achieved especially with data-intensive applications. Associative processors (APs) were proposed since the seventies and recently were revived thanks to the high-density memories. In this tutorial brief, We overview the functionalities and recent trends of APs in addition to the implementation of each Content-addressable memory with different technologies. The AP operations and runtime complexity are also summarized. We also explain and explore the possible applications that can benefit from APs. Finally, the AP limitations, challenges and future directions are discussed.

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“…Contentaddressable memory (CAMs) is one way to implement AMs. CAMs can be realized with different technologies, for instance, digital CAMs are implemented using standard CMOS and flipflops [14]. However, these types of architecture have high power consumption and low density.…”

Section: Introductionmentioning

confidence: 99%

DNA Pattern Matching Acceleration with Analog Resistive CAM

Jinane¹,

Sweidan²,

Fouda³

et al. 2022

Preprint

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DNA pattern matching is essential for many widely used bioinformatics applications. Disease diagnosis is one of these applications, since analyzing changes in DNA sequences can increase our understanding of possible genetic diseases. The remarkable growth in the size of DNA datasets has resulted in challenges in discovering DNA patterns efficiently in terms of run time and power consumption. In this paper, we propose an efficient hardware and software codesign that determines the chance of the occurrence of repeat-expansion diseases using DNA pattern matching. The proposed design parallelizes the DNA pattern matching task using associative memory realized with analog content-addressable memory and implements an algorithm that returns the maximum number of consecutive occurrences of a specific pattern within a DNA sequence. We fully implement all the required hardware circuits with PTM 45-nm technology, and we evaluate the proposed architecture on a practical human DNA dataset. The results show that our design is energy-efficient and significantly accelerates the DNA pattern matching task compared to previous approaches described in the literature.

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An FPGA Implementation of a Multi-comparand Multi-search Associative Processor

Cited by 9 publications

References 13 publications

In-Memory Associative Processors: Tutorial, Potential, and Challenges

In-Memory Associative Processors: Tutorial, Potential, and Challenges

In-memory Associative Processors: Tutorial, Potential, and Challenges

DNA Pattern Matching Acceleration with Analog Resistive CAM

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