In-Memory Associative Processors: Tutorial, Potential, and Challenges

Fouda, Mohammed E.; Yantır, Hasan Erdem; Eltawil, Ahmed M.; Kurdahi, Fadi

doi:10.1109/tcsii.2022.3170468

Cited by 10 publications

(7 citation statements)

References 50 publications

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“…Our comparison includes the resistive device-based NORtype AP (RAP) presented in [42]. NOR configuration is the reason RAP outperforms the AM 4 .…”

Section: Application Of Am 4 Ap To Smith-waterman Dna Sequence Alignmentmentioning

confidence: 99%

“…Several emerging memory (memristor crossbar) approximate search CAM designs have also been proposed [55], [56]. Some offer softerror tolerance using error correction coding (which requires 4 and the design (RAP) proposed in [42] versus different reference solutions: SWAPHI-LS [37], RIVYERA [38], CUDAlign 4.0 [39], PRINS [9], and SWhybrid [40]. Higher is better; TCUP = Tera cell updates per second.…”

Section: Related Workmentioning

confidence: 99%

“…Fig. 19: Smith-Waterman DNA and Protein Sequence Alignment: (a) speedup and (b) energy-efficiency gain of AM4 and the design (RAP) proposed in[42] versus different reference solutions: SWAPHI-LS[37], RIVYERA[38], CUDAlign 4.0[39], PRINS[9], and SWhybrid[40]. Higher is better; TCUP = Tera cell updates per second.…”

mentioning

confidence: 99%

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AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

Garzón

Lanuzza

Teman

et al. 2023

IEEE J. Emerg. Sel. Topics Circuits Syst.

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In-memory computing seeks to minimize data movement and alleviate the memory wall by computing in-situ, in the same place that the data is located. One of the key emerging technologies that promises to enable such computing-inmemory is spin-transfer torque magnetic tunnel junction (STT-MTJ). This paper proposes AM 4 , a combined STT-MTJ-based Content Addressable Memory (CAM), Ternary CAM (TCAM), approximate matching (similarity search) CAM (ACAM), and in-memory Associative Processor (AP) design, inspired by the recently announced Samsung MRAM crossbar. We demonstrate and evaluate the performance and energy-efficiency of the AM 4based AP using a variety of data intensive workloads. We show that an AM 4 -based AP outperforms state-of-the-art solutions both in performance (with the average speedup of about 10 ×) and energy-efficiency (by about 60 × on average).

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“…Our comparison includes the resistive device-based NORtype AP (RAP) presented in [42]. NOR configuration is the reason RAP outperforms the AM 4 .…”

Section: Application Of Am 4 Ap To Smith-waterman Dna Sequence Alignmentmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

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AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

Garzón

Lanuzza

Teman

et al. 2023

IEEE J. Emerg. Sel. Topics Circuits Syst.

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“…In-memory computing is also referred to as in-memory acceleration, whereby the computing is offloaded from the CPU to the memory module. While there exist several methods for in-memory computing for conventional (non-NF) applications in the existing research studies, see e.g., [237]- [240], a novel aspect to explore in future research is to utilize in-memory computing for NF applications. Typically, NF applications are driven by I/O events originating from the memory transactions for the packet processing by the CPU.…”

Section: B: Memory Allocation For In-memory Computingmentioning

confidence: 99%

Operating Systems and Hypervisors for Network Functions: A Survey of Enabling Technologies and Research Studies

et al. 2022

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Scalable and flexible communication networks increasingly conduct the packet processing for Network Functions (NFs) in General Purpose Computing (GPC) platforms. The input/output (I/O)-intensive and latency-sensitive packet processing is challenging for the operating systems and hypervisors running on GPC platforms. This article surveys the existing enabling technologies and research studies on operating system and hypervisor aspects that directly influence the packet processing for NFs on GPC platforms. We organize this survey according to the main categories abstraction approach, memory access, and I/O strategy. We further categorize abstraction approach technologies and research studies into the categories operation systems, hypervisors, and containers. We partition the memory access category into the two subcategories of memory allocation and memory access, while we partition the I/O strategy category into the sub-categories I/O device virtualization and I/O device access. Our survey gives a comprehensive summary of the capabilities and limitations of the existing enabling technologies and researched approaches for abstraction, memory access, and I/O for NF packet processing. We outline critical future research directions for advancing NF packet processing on GPC platforms.

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“…However, these types of architecture have high power consumption and low density. Accordingly, various emerging resistive device technologies have been used to implement some recently proposed CAMs, benefiting from their non-volatility and high packing density [15]. Examples of resistive devices include ReRAM, phase change memory, magnetic tunneling junctions, and ferroelectric devices [16].…”

Section: Introductionmentioning

confidence: 99%

DNA Pattern Matching Acceleration with Analog Resistive CAM

Jinane¹,

Sweidan²,

Fouda³

et al. 2022

Preprint

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DNA pattern matching is essential for many widely used bioinformatics applications. Disease diagnosis is one of these applications, since analyzing changes in DNA sequences can increase our understanding of possible genetic diseases. The remarkable growth in the size of DNA datasets has resulted in challenges in discovering DNA patterns efficiently in terms of run time and power consumption. In this paper, we propose an efficient hardware and software codesign that determines the chance of the occurrence of repeat-expansion diseases using DNA pattern matching. The proposed design parallelizes the DNA pattern matching task using associative memory realized with analog content-addressable memory and implements an algorithm that returns the maximum number of consecutive occurrences of a specific pattern within a DNA sequence. We fully implement all the required hardware circuits with PTM 45-nm technology, and we evaluate the proposed architecture on a practical human DNA dataset. The results show that our design is energy-efficient and significantly accelerates the DNA pattern matching task compared to previous approaches described in the literature.

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In-Memory Associative Processors: Tutorial, Potential, and Challenges

Cited by 10 publications

References 50 publications

AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

Operating Systems and Hypervisors for Network Functions: A Survey of Enabling Technologies and Research Studies

DNA Pattern Matching Acceleration with Analog Resistive CAM

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In-Memory Associative Processors: Tutorial, Potential, and Challenges

Cited by 10 publications

References 50 publications

AM4: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

AM4: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

Operating Systems and Hypervisors for Network Functions: A Survey of Enabling Technologies and Research Studies

DNA Pattern Matching Acceleration with Analog Resistive CAM

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Product

Resources

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AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing