2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) 2013
DOI: 10.1109/essderc.2013.6818827
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An experimental study of integrated DMOS transistors with increased energy capability

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Cited by 5 publications
(3 citation statements)
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“…Neither technology changes nor external circuitry is needed. Part of this paper has already been discussed in [14] and [15]. This paper extends the results by additional simulations and experiments.…”
supporting
confidence: 64%
“…Neither technology changes nor external circuitry is needed. Part of this paper has already been discussed in [14] and [15]. This paper extends the results by additional simulations and experiments.…”
supporting
confidence: 64%
“…Costăchescu et al [1] uses a feedback circuit to control individual power densities according to temperatures measured by embedded sensors. Zawischka et al [2] modifies the chip layout by reduced source contact density or separated gates. Another way is to lower the temperature rise within the active transistor by incorporation of a thick Cu layer on top of the power device [3].…”
Section: Introductionmentioning
confidence: 99%
“…In spite of the very different temperature distributions, the peak temperatures are the same, as shown Fig.3 (temperature profile along the AA' cutline from Fig.1). While this situation may appear counterintuitive due to the higher power density, in the case of setup#2, a higher thermal capacitance is actually available, due to the Silicon volume of the disabled active area from the center of the device, where no power dissipation occurs [8]. It is important that the ambient temperature and the peak temperatures to be the same in both cases, because [1]- [3] state that the lifetime of power devices is directly proportional to these quantities.…”
Section: Dmos Transistors Were Thermo-mechanically Stressed Under Thementioning
confidence: 99%