DMOS transistors are often subject to large power dissipation and thus substantial self-heating. This can lead to extremely high device temperatures, thermal runaway, and device failure. Because of this, the safe operating area of the DMOS is limited by its peak temperature. Therefore, it has been suggested to lower the peak temperature by shifting the heat generation from the hotter to the cooler parts of the device.In this paper a simple approach to redistribute the power dissipation density in DMOS transistors will be presented that can be used to reduce the peak temperature significantly. The proposed approach can easily be applied to integrated and discrete power MOSFETs. Layout modifications are usually sufficient, no process changes are required. The impact on the electrical characteristics of the DMOS will be evaluated and explained. The presented approach can effectively lower the peak temperature in typical DMOS transistors as will be demonstrated by measurements and numerical simulations.
DMOS transistors are often subject to high power dissipation and thus substantial self-heating. This limits their safe operating area because very high device temperatures can lead to thermal runaway and subsequent destruction. Because the peak temperature usually occurs only in a small region in the device, it is possible to redistribute part of the dissipated power from the hot region to the cooler device areas. In this way, the peak temperature is reduced, whereas the total power dissipation is still the same. Assuming that a certain temperature must not be exceeded for safe operation, the improved device is now capable of withstanding higher amounts of energy with an unchanged device area. This paper presents two simple methods to redistribute the power dissipation density and thus lower the peak device temperature. The presented methods only require layout changes. They can easily be applied to modern power technologies without the need of process modifications. Both methods are implemented in test structures and investigated by simulations and measurements.Index Terms-DMOS transistor, integrated power technologies, peak temperature, power dissipation density, power metaloxide-semiconductor field-effect transistor (MOSFET), thermal behavior, thermal runaway.
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