Abrupt breakdown in dielectric/metal gate stacks: a potential reliability limitation?

Abstract

In downscaled poly-Si gate MOSFET devices reliability margin is gained by progressive wearout. When the poly-Si gate is replaced with a metal gate, the slow wearout phase observed in ultrathin SiON and HfSiON dielectrics with poly-Si gate disappears, and with it, the reliability margin. We demonstrate for several combinations of dielectric and gate materials that the large abrupt current increase (1 ) as compared to poly-Si is not likely due to process issues, but is an intrinsic property of the dielectric/metal gate stack. The occurrence of large 1 is a potential limitation for the reliability of metal gate devices.Index Terms-Dielectric breakdown (BD), metal gate, reliability.

Failure Defects Observed in Post-Breakdown High-κ/Metal Gate Stack Mosfet

“…NMOSFETs (W/L = 0.25µm/0.5µm & 0.25µm/0.05µm) having SiO x interfacial layer (IL)/HfO 2 high-κ/TaN/TiN metal gate stack [8] with equivalent oxide thicknesses (EOTs) of 19.5Å-23.6Å were used. Constant voltage stress (CVS) and successive CVS (SCVS) [3] at 100°C with an applied voltage (V gstress ) of (+/-) 3.0V-(+/-) 4.5V and a gate leakage current compliance limit (I gl ) of 500nA-10mA were employed.…”

“…High degradation rate in the gate leakage current is very common in breakdown (BD) of tungsten-gate/SiON metal-oxidesemiconductor (MOS) capacitors [7], and in high-κ/metal gate stacks metal-oxide-semiconductor field effect transistors (MOSFETs) [8]. Kauerauf et al [8] found that the metal gate electrode plays an important role for the abrupt large gate leakage current increase upon breakdown of high-κ/metal gate stacks.…”

“…Kauerauf et al [8] found that the metal gate electrode plays an important role for the abrupt large gate leakage current increase upon breakdown of high-κ/metal gate stacks.…”

Breakdown in the metal/high-k gate stack: Identifying the “weak link” in the multilayer dielectric

“…In spite of significant efforts [1][2][3][4][5], major factors controlling time-dependent dielectric breakdown (TDDB) in the metal/high-k gate stacks still remain unclear. An essentially complicating feature of the MIS high-k gate stacks is that they are multilayer (at least two films: a high-k HK and interfacial SiO 2 layer [IL]) structures, both layers being modified by the inter-material interaction with each other and the metal electrode.…”

Degradation and breakdown characteristics of thin MgO dielectric layers

“…In the case of SiO 2 layers with a thickness in excess of ϳ5 nm, the I-t trace generally consists of the charging phase then a sudden hard breakdown with a current rise into the milliamp range corresponding to the formation of a leakage path and almost instantaneous thermal runaway. 7 The progressive breakdown behavior ͑also reported in Ref. 4͒ for such a thick layer suggests differences in the defect generation mechanism in MgO.…”