A highly manufacturable 0.25μm RF technology utilizing a unique SiGe integration

Johnson, F.S.; Ai, Jian; Dunn, S. Thomas; Kareh, B. El; Erdeljac, J.; John, Sajeev; Benaissa, K.; Bellaour, A.; Benna, B.; Hodgson, L.; Hoffleisch, G.; Hutter, Lou N.; Jaumann, M.; Jumpertz, R.; Mercer, M.R.; Nair, Manju S.; Seitchik, J.A.; Shen, Chih-Hsiung; Schiekofer, Manfred; Scharnagl, T.; Schimpf, K.; Schulz, Ulrike; Staufer, B.; Stroth, L.; Tatman, D.; Thompson, Matthew A.; Williams, B.; Violette, Katherine E.

doi:10.1109/bipol.2001.957856

Cited by 4 publications

(2 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Currently, chip manufacturers focus mainly on the integration of Si 1Ϫx Ge x in heterojunction bipolar transistors ͑HBT͒ in Bi complementary metal oxide semiconductor ͑BiCMOS͒ technology. [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15] In a next phase, attention goes to the fabrication of Si/Si 1Ϫx Ge x heterojunction CMOS devices to improve the performance of the p-type metal oxide semiconductor ͑MOS͒ device, [16][17][18][19][20][21][22][23][24] and to elevated Si 1Ϫx Ge x source/drain contacts to reduce short channel effects in CMOS technology. [25][26][27][28][29] For the first two applications, both selective and nonselective epitaxial growth by means of chemical vapor deposition ͑CVD͒ can be used.…”

mentioning

confidence: 99%

Successful Selective Epitaxial Si[sub 1−x]Ge[sub x] Deposition Process for HBT-BiCMOS and High Mobility Heterojunction pMOS Applications

Loo

Caymax

Peytier

et al. 2003

J. Electrochem. Soc.

View full text Add to dashboard Cite

Si 1Ϫx Ge x /Si heterostructures are useful for numerous device applications where device performance is improved by band offsets and/or increased carrier mobility. The use of selective epitaxial growth for the implementation of Si 1Ϫx Ge x has some advantages compared to a nonselective growth process. However, some issues such as thickness nonuniformity ͑microloading on a micrometer scale and gas depletion on a wafer scale͒ and facet formation must be solved. In this paper, we give a detailed overview of our selective Si 1Ϫx Ge x growth process in a standard production-oriented chemical vapor deposition system for Ge contents between 0 and 32%. Our process allows layer deposition with no pattern dependence of the growth rate and Ge content ͑no microloading͒ and with a wafer scale layer nonuniformity that is better than the accuracy of the measurement techniques (ϳ2%). Facet formation was avoided by choosing the correct growth conditions and by preventing lateral growth over the mask material. Selective epitaxial layers did not show a degradation of photoluminescence characteristics. The layer quality is further demonstrated by the performance of Si 1Ϫx Ge x heterojunction bipolar transistors ͑0.35 and 0.25 m technology͒, and p-type Si 1Ϫx Ge x heterojunction metal oxide semiconductor devices ͑effective gate length down to 70 nm͒.

show abstract

mentioning

confidence: 99%

Successful Selective Epitaxial Si[sub 1−x]Ge[sub x] Deposition Process for HBT-BiCMOS and High Mobility Heterojunction pMOS Applications

Loo

Caymax

Peytier

et al. 2003

J. Electrochem. Soc.

View full text Add to dashboard Cite

show abstract

“…Many solutions are known in the literature. For non-selective epitaxial SiGe processing, the problem has recently been addressed in [6], where a boron silicate glass (BSG) landing pad is used as an etch stop and a diffusion source for a base link-up.…”

Section: Introductionmentioning

confidence: 99%

A Self-Aligned Double Poly-Si Process Utilizing Non-Selective Epitaxy of SiGe:C for Intrinsic Base and Poly-SiGe for Extrinsic Base

Pejnefors

Johansson²,

Wittborn³

et al. 2002

32nd European Solid-State Device Research Conference

View full text Add to dashboard Cite

A self-aligned double poly-Si process using nonselective epitaxy of SiGe:C for the intrinsic base and a dual stack of poly-Si and poly-SiGe for the extrinsic base is presented. Self-alignment of the extrinsic base is obtained by detailed control of the emitter window etch procedure. The etch of the extrinsic base is endpointed at the poly-Si/poly-SiGe interface, and is followed by a timed etch of the SiGe film. Due to the selectivity towards Si, the etch can be stopped at the epitaxial Si surface.The SiGe:C epitaxy is obtained using ultra-high vacuum chemical vapor deposition (UHV/CVD). As a result of the slightly higher growth rate of the epitaxial film compared to the polycrystalline material, an almost planar surface could be obtained.Working devices have been verified by electrical measurements.

show abstract

Review of SiGe process technology and its impact on RFIC design

Das

Huang

Mondal

et al.

2002 IEEE MTT-S International Microwave Symposium Digest (Cat. No.02CH37278)

View full text Add to dashboard Cite

A highly manufacturable 0.25μm RF technology utilizing a unique SiGe integration

Cited by 4 publications

References 3 publications

Successful Selective Epitaxial Si[sub 1−x]Ge[sub x] Deposition Process for HBT-BiCMOS and High Mobility Heterojunction pMOS Applications

Successful Selective Epitaxial Si[sub 1−x]Ge[sub x] Deposition Process for HBT-BiCMOS and High Mobility Heterojunction pMOS Applications

A Self-Aligned Double Poly-Si Process Utilizing Non-Selective Epitaxy of SiGe:C for Intrinsic Base and Poly-SiGe for Extrinsic Base

Review of SiGe process technology and its impact on RFIC design

Contact Info

Product

Resources

About