A direct method to extract extrinsic capacitances of rf SOI MOSFETs using common source‐body and gate‐body configurations

Abstract

A direct extraction method is newly proposed to determine all extrinsic capacitances including the drain‐source coupling capacitance in a buried oxide layer of RF SOI MOSFETs. This new method is based on Y‐parameter equations derived from two “off” state equivalent circuits under common source‐body and gate‐body configurations. Using this method, the gate voltage‐dependent extrinsic capacitance data are extracted and small‐signal equivalent circuit modeling is accurately performed. © 2016 Wiley Periodicals, Inc. Microwave Opt Technol Lett 58:2851–2853, 2016

SPICE modeling for RF kink effect in body contacted PD‐SOI nMOSFETs

“…Figure 1 is a newly proposed SPICE BSIMSOI4 macro model that includes a RLC resonance circuit to represent RF kink effect of BCT PD‐SOI nMOSFETs accurately. In this model, I k,DC is the DC kink current source including self‐heating effect, 11 I k,RF is the current source modeling the difference between DC and RF kink currents, C RF is the coupling capacitance to block I k,RF at DC, L k is the kink effect inductance, R c is the RF channel resistance, 12 C c is the capacitance to model the R c effect at low frequencies, R g is the external gate resistance, R b is the external body resistance, C gdx is the parasitic external gate‐drain capacitance, C gsx is the parasitic external gate‐source capacitance, and C box is the buried oxide coupling capacitance 13 . Separate current sources for DC and RF kink current are newly proposed in this work.…”

“…In Figure 1, C box is extracted through a RF extraction method using the Y‐parameter equation of a small‐signal model 13 . The accurate modeling of L k is significant to simulate the RF kink effect of S 21 ‐ and S 22 ‐parameters rotating in half circles with increasing frequency.…”

Frequency‐dependent empirical modeling for intrinsic output capacitance and conductance of HR PD‐SOI MOSFETs

“…A conventional RC equivalent circuit model with frequency‐independent parameters for RF HR PD‐SOI MOSFETs is shown in Figure . In this model, R g is the gate resistance, R d is the drain resistance, R s is the source resistance, C gs is the gate‐source capacitance, C gd is the gate‐drain capacitance, g m is the transconductance ( g m = g mo e ‐jωτ ), C jd is the drain junction capacitance, R b is the body resistance, g dso is the dc drain‐source conductance because of channel length modulation in the saturation region, C ds is the depletion capacitance in the pinch‐off region between the drain and the end of the channel, R c is the inversion channel resistance in the saturation region, and C box is the source‐drain lateral coupling capacitance existing in the buried oxide region …”

“…In this model, R g is the gate resistance, R d is the drain resistance, R s is the source resistance, C gs is the gate-source capacitance, C gd is the gatedrain capacitance, g m is the transconductance ( g m = g mo ejωτ ), C jd is the drain junction capacitance, R b is the body resistance, g dso is the dc drain-source conductance because of channel length modulation in the saturation region, C ds is the depletion capacitance in the pinch-off region between the drain and the end of the channel, 5,6 R c is the inversion channel resistance in the saturation region, 5,6 and C box is the source-drain lateral coupling capacitance existing in the buried oxide region. 7 In the high-frequency (HF) region of Figure 2, the series resistances are extracted to be R d = 1.73 Ω, R g = 5.43 Ω, and R s = 4.17 Ω at V ds = V gs = 0 V using y-intercepts of ((1)-(3)) vs ω −2 , respectively 8 :…”