A 14-bit 1.0-GS/s dynamic element matching DAC with >80 dB SFDR up to the Nyquist

Abstract

A 14-bit 1.0-GS/s current-steering digital-to-analog converter (DAC) was designed in a 65-nm CMOS process. For such current-steering DACs with a high sampling rate, the codedependent load variations and switching glitches are a main bottleneck which limits the spurious-free dynamic range (SFDR). Dynamic element matching (DEM) has been an effective solution to randomize these glitches for a higher SFDR and also to reduce the matching requirement of the current cells for an areaefficient design which also improves the SFDR with reduced parasitic capacitance. An effective method named TRI-DEMRZ is proposed in this paper, consisting of time-relaxed interleaving, DEM and return-to-zero encoding. We also apply TRI-DEMRZ in synergy with complementary switched current sources (CSCS) to design the DAC for the purpose of a small die size and enhanced SFDR performance. Post-layout simulations show >80 dB SFDR up to the Nyquist. This DAC has a mixed 1.2 V / 2.5 V power supply and an active area of 0.48 mm 2 . Keywords-Digital-to-analog converter (DAC); mismatch; Dynamic element matching (DEM); return-to-zero (RZ); spuriousfree dynamic range (SFDR)I.978-1-4799-8391-9/15/$31.00 ©2015 IEEE

Redundancy‐bandwidth scalable techniques for signal‐independent element transition rates in high‐speed current‐steering DACs

“…The simulated DAC is constructed with transistors and has 14-bit resolution with 6 unary-weighted most significant bits (MSBs), 4 unary-weighted upper least significant bits, and 4 binary-weighted last-significant bits. It is because that the randomized operations in the time-relaxed interleaving digital-random-return-to-zero (TRI-DRRZ) 3 and the time-relaxed interleaving DEMRZ (TRI-DEMRZ) 4 usually increase the noise floor. Figure 17 shows the simulated SFDR and SNDR of a 14-bit 1-GS/s DAC with different techniques.…”

“…3,4 Fortunately, the redundancy can be reduced under 2 facts. The increased number of current sources will introduce more area and power consumption, which is the main drawback of all the techniques with redundancy, such as the interleaved RZ techniques.…”

“…[1][2][3][4] Meanwhile, it should be noted that, as oversampling and noise shaping are not adopted, the in-band noise performance of our strategy may not be as good as those with the ΔΣ techniques (see Figure 9), such as the techniques in Shui et al 12 and Sanyal et al 15,16 According to Clara 30 and Wikner, 31 the theoretical maximum SNR of a Lth-order noise shaper is SNR max;L ¼ 6:02P þ 1:76 þ ð20L þ 10Þlog 10 ðOSRÞ − 10log 10 π 2L 2L þ 1 ðdBÞ; [1][2][3][4] Meanwhile, it should be noted that, as oversampling and noise shaping are not adopted, the in-band noise performance of our strategy may not be as good as those with the ΔΣ techniques (see Figure 9), such as the techniques in Shui et al 12 and Sanyal et al 15,16 According to Clara 30 and Wikner, 31 the theoretical maximum SNR of a Lth-order noise shaper is SNR max;L ¼ 6:02P þ 1:76 þ ð20L þ 10Þlog 10 ðOSRÞ − 10log 10 π 2L 2L þ 1 ðdBÞ;…”

“…[1][2][3][4][5][6][7][8][9][10][11] Techniques used to improve the SFDR in high-speed applications rely on more stringent clocking 1,2,12-20 (eg, half-cycle sampling) or increased area [3][4][5][6][7][8]19,[21][22][23][24] (eg, 2 interleaved sub-DACs). One key performance metric for its high-speed and wideband applications is the dynamic linearity, usually evaluated as the spurious-free dynamic range (SFDR).…”

“…As depicted in Figure 1, during the transition of successive sampling clock cycles, there exist a certain number of switching activities, named as the element transition rate (ETR). The techniques with signal-independent ETRs can be categorized into the quad-switching-based approaches, [5][6][7][8]22 the randomized return-to-zero-based (RZ-based) techniques, [1][2][3][4] and the ΔΣ-based techniques. With reduced correlation between the input code and the ETR, the techniques 1-8,12-16 turn most of the ISI errors into an offset and thus increase the linearity significantly.…”